MC68HC705C8ACS

Manufacturer Part NumberMC68HC705C8ACS
ManufacturerFreescale Semiconductor, Inc
MC68HC705C8ACS datasheet
 


1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
Page 141
142
Page 142
143
Page 143
144
Page 144
145
Page 145
146
Page 146
147
Page 147
148
Page 148
149
Page 149
150
Page 150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
Page 145/222:

Multiple-SPI Systems

Download datasheet (3Mb)Embed
PrevNext
Freescale Semiconductor, Inc.
Example:
LDA #$1C
STA SPCR
LDA #$4C
STA SPCR
11.5 Multiple-SPI Systems
In a multiple-SPI system, all PD4/SCK pins are connected together, all
PD3/MOSI pins are connected together, and all PD2/MISO pins are
connected together.
Before a transmission, one SPI is configured as master and the rest are
configured as slaves.
master SPI and three slave SPIs.
Figure 11-4. One Master and Three Slaves Block Diagram
Figure 11-5
three slave SPIs.
MC68HC705C8A — Rev. 3
MOTOROLA
For More Information On This Product,
; MSTR = 1, CPOL = 1, CPHA = 1,
; SPR1 = SPR0 = 0
; SPI control register
; MSTR = 0, SPE = 1, CPOL = 1, CPHA = 1,
; SPR1 = SPR0 = 0
; SPI control register
Figure 11-4
is a block diagram showing a single
MASTER MCU
PD2/MISO
PD3/MOSI
PD4/SCK
PD5/SS
V
DD
2
I/O
1
PORT
0
SLAVE MCU 2
SLAVE MCU 1
is another block diagram with two master/slave SPIs and
Serial Peripheral Interface (SPI)
Go to: www.freescale.com
Serial Peripheral Interface (SPI)

Multiple-SPI Systems

SLAVE MCU 0
Technical Data