ADP3120A Analog Devices, ADP3120A Datasheet
ADP3120A
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ADP3120A Summary of contents
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... Dual Bootstrapped MOSFET Driver with Output Disable GENERAL DESCRIPTION The ADP3120A is a dual, high voltage MOSFET driver optimized for driving two N-channel MOSFETs, the two switches in a nonisolated synchronous buck power converter. Each driver is capable of driving a 3000 pF load with propaga- tion delay and transition time ...
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... ADP3120A TABLE OF CONTENTS Features .............................................................................................. 1 Applications....................................................................................... 1 General Description ......................................................................... 1 Functional Block Diagram .............................................................. 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 Absolute Maximum Ratings............................................................ 4 ESD Caution.................................................................................. 4 Pin Configurations and Function Descriptions ........................... 5 Timing Characteristics..................................................................... 6 Typical Performance Characteristics ............................................. 7 Theory of Operation ........................................................................ 9 REVISION HISTORY 3/06—Revision 0: Initial Version Low-Side Driver ............................................................................9 High-Side Driver ...........................................................................9 Overlap Protection Circuit...........................................................9 Application Information ...
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... LOAD nF, see Figure 5 pdlDRVL LOAD See Figure 4 t pdl OD See Figure 4 t pdh PGND BST = SYS V rising CC Rev Page ADP3120A Min Typ Max Unit 2.0 V 0.8 V −1 +1 μA 90 250 mV 3.3 Ω 2.5 3.9 Ω 1.8 Ω 1.4 2.6 Ω 10 kΩ ...
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... ADP3120A ABSOLUTE MAXIMUM RATINGS Table 2. Parameter Rating VCC −0 +15 V BST DC −0 <200 ns −0 +35 V BST to SW −0 + − +15 V <200 ns − +25 V DRVH DC SW − 0 BST + 0.3 V <200 ns SW − BST + 0.3 V ...
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... MOSFET from turning on until the voltage is below ~ DRVH Buck Drive. Output drive for the upper (buck) MOSFET. DRVH SW PGND DRVL Rev Page ADP3120A PIN 1 BST 1 8 DRVH INDICATOR ADP3120A PGND TOP VIEW (Not to Scale) VCC 4 5 DRVL Figure 3. 8-Lead LFCSP_VD Pin Configuration ...
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... ADP3120A TIMING CHARACTERISTICS Timing is referenced to the 90% and 10% points, unless otherwise noted pdlOD DRVH OR DRVL IN t pdlDRVL DRVL DRVH-SW SW 90% Figure 4. Output Disable Timing Diagram t fDRVL t t pdhDRVH rDRVH V TH Figure 5. Timing Diagram Rev Page pdhOD 10 pdlDRVH rDRVL ...
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... 3nF LOAD 30 DRVH JUNCTION TEMPERATURE (°C) Figure 8. DRVH and DRVL Rise Times vs. Temperature DRVL 100 125 Rev Page ADP3120A 12V 3nF LOAD DRVH DRVL JUNCTION TEMPERATURE (°C) Figure 9. DRVH and DRVL Fall Times vs. Temperature ...
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... ADP3120A 25° 12V 3nF LOAD 200 400 600 800 FREQUENCY (kHz) Figure 12. Supply Current vs. Frequency 12V 3nF LOAD f = 250kHz JUNCTION TEMPERATURE (°C) Figure 13. Supply Current vs. Temperature 1000 1200 1400 100 125 Rev ...
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... BST side gate drive voltage and to limit the switch node slew rate (called a Boot-Snap™ circuit—see the Application Information section for more details). When the ADP3120A starts up, the SW pin is at ground, so the bootstrap capacitor charges through D1. When the PWM input goes high, the high-side ...
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... Use a 4.7 μF, low ESR capacitor. Multilayer ceramic chip (MLCC) capacitors provide the best combination of low ESR and small size. Keep the ceramic capacitor as close as possible to the ADP3120A. BOOTSTRAP CIRCUIT The bootstrap circuit uses a charge storage capacitor (C and a diode, as shown in Figure 1 ...
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... The low-side MOSFETs are usually selected to have a low on resistance to minimize conduction losses. This usually implies a large input gate capacitance and gate charge. The first concern is to make sure the power delivery from the ADP3120A DRVL does not exceed the thermal rating of the driver (see the ADP3186, ADP3188, or ...
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... ADP3120A Figure 16. VRD 10.x-Compliant Power Supply Circuit Rev Page ...
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... Standard Small Outline Package (SOIC_N) 8-Lead Standard Small Outline Package (SOIC_N) 8-Lead Lead Frame Chip Scale Package (LFCSP_VD) Rev Page 0.50 (0.0196) × 45° 0.25 (0.0099) 8° 0° 1.27 (0.0500) 0.40 (0.0157) 0.50 0.40 0.30 PIN 1 INDICATOR 1 8 1.89 1.50 1.74 REF 1. 1.60 1.45 1.30 Package Ordering Option Quantity R-8 N/A R-8 2,500 CP-8-2 5,000 ADP3120A Branding L3C ...
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... ADP3120A NOTES Rev Page ...
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... NOTES Rev Page ADP3120A ...
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... ADP3120A NOTES ©2006 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D05812-0-3/06(0) Rev Page ...