UPD70325 Renesas Electronics Corporation., UPD70325 Datasheet
UPD70325
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UPD70325 Summary of contents
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SINGLE-CHIP MICROCONTROLLER The PD70325 (V25 single-chip microcontroller on which 16-bit CPU, RAM, serial interface, timer, DMA controller, interrupt controller, etc. are all integrated. The PD70325 is software compatible with the 16/8-bit single- chip microcontroller PD70320 (V25 to ...
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ORDERING INFORMATION Part Number PD70325GJ-8-5BG 94-pin plastic QFP (20 PD70325GJ-10-5BG 94-pin plastic QFP (20 PD70325L-8 84-pin plastic QFJ (1150 PD70325L-10 84-pin plastic QFJ (1150 2 Package External Clock (MHz) 20 mm) 20 mm) 1150 mil) 1150 mil) PD70325 16 20 ...
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Comparison between V25 and V25+ Transfer processing method Maximum transfer rate (8-MHz operation) Sampling timing of DMA request DMA service channel Specification method of transfer address Segment method Execution format in single-step mode 1 DMA transfer/1 instruction execution DMA Interrupt ...
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PIN CONFIGURATION (Top View) 94-Pin Plastic QFP PD70325GJ-8-5BG PD70325GJ-10-5BG A12 A13 3 A14 4 ...
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Plastic QFJ PD70325L-8 PD70325L- P07/CLKOUT ...
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P20/DMARQ0 P21/DMAAK0 PROGRAMMABLE P22/TC0 DMA P23/DMARQ1 CONTROLLER P24/DMAAK1 P25/TC1 TxD0 SERIAL RxD0 INTERFACE P16/SCK0 CTS0 TxD1 BAUD RATE RxD1 GENERATOR CTS1 NMI (P10) PROGRAMMABLE P11/INTP0 INTERRUPT P12/INTP1 P13/INTP2/INTAK CONTROLLER P14/INT/POLL 16-BIT TIMER TOUT/P15 REFRQ Note The internal ROM of 8 ...
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PIN FUNCTIONS .................................................................................................................................. 8 1.1 Port Pins ....................................................................................................................................................... 8 1.2 Non-port Pins ............................................................................................................................................... 9 2. INSTRUCTION SETS ......................................................................................................................... 10 2.1 Comparison between PD70108 and 70116 ........................................................................................... 10 2.2 Instruction Set Operation ......................................................................................................................... 12 2.3 Instruction Set Table ................................................................................................................................. 16 ...
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PIN FUNCTIONS 1.1 Port Pins Pin Name Input/Output P00 to P06 Input & output P07/CLKOUT Input & output/output NMI (P10) Input P11/INTP0 P12/INTP1 P13/INTP2/INTAK Input/input/output P14/POLL/INT Input & output/input/input P15/TOUT Input & output/output P16/SCK0 P17/READY Input & output/input P20/DMARQ0 ...
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Non-port Pins Pin Name Input/Output TxD0 Output Serial data output TxD1 RxD0 Input Serial data input RxD1 CTS0 Input & output CTS input in asynchronous mode, receive clock input/output in I/O interface mode CTS1 Input CTS input REFRQ Output ...
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INSTRUCTION SETS The PD70325 instruction sets are compatible with those of PD70320. 2.1 Comparison between PD70108 and 70116 The PD70325 instruction sets are upward-compatible with those of PD70108/70116 in native mode. The following instructions are newly added to the ...
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Register bank switch instructions • BRKCS ······ Used to switch register banks A register bank is switched to the register bank indicated by the lower 3 bits in the 16-bit register described in the operand. The program is also ...
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Instruction Set Operation Identifier reg, reg’ 8-/16-bit general register reg8, reg8’ 8-bit general register reg16, reg16’ 16-bit general register dmem 8-/16-bit memory location mem 8-/16-bit memory location mem8 8-bit memory location mem16 16-bit memory location mem32 32-bit memory location ...
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Table 2-2. Operation Code Identifier Identifier W Byte/word specification bit (0: byte, 1: word). However, when the sign extended byte data should be 16-bit operand even when reg, reg’ Register field (000 to 111) ...
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Table 2-3. Operation Identifier (2/2) Identifier temp Temporary register (8/16/32 bits) tmpcy Temporary carry flag (1 bit) seg Immediate segment data (16 bits) offset Immediate offset data (16 bits) Transfer direction + Addition – Subtraction Multiplication Division % Modulo AND ...
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Table 2-6. 8/16-Bit General Register Selection reg, reg’ 000 AL 001 CL 010 DL 011 BL 100 AH 101 CH 110 DH 111 BH Table 2-7. Segment Register Selection sreg 00 DS1 ...
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Operation Code Group Mnemonic Operand Data reg,reg’ MOV transfer mem,reg reg,mem ...
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Operation Code Group Mnemonic Operand Repeat REPC prefix REPNC ...
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Operation Code Group Mnemonic Operand reg8,reg8’ Bit field INS opera- tion 1 1 reg’ reg reg8,imm4 ...
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Operation Code Group Mnemonic Operand Addi- ADD reg,reg’ tion/ subtrac- mem,reg tion reg,mem ...
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Operation Code Group Mnemonic Operand BCD ADD4S opera- tion SUB4S ...
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Operation Code Group Mnemonic Operand Multipli- reg8 MULU cation mem8 reg16 ...
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Operation Code Group Mnemonic Operand Unsign- reg8 DIVU ed division mem8 reg16 ...
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Operation Code Group Mnemonic Operand Signed DIV reg8 division mem8 reg16 ...
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Operation Code Group Mnemonic Operand BCD ADJBA adjust- ment ADJ4A ADJBS ...
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Operation Code Group Mnemonic Operand Logical TEST reg,reg’ opera- mem,reg tion reg,mem reg,imm ...
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Operation Code Group Mnemonic Operand Bit TEST1 reg8, manipu- lation mem8, reg16, mem16, ...
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Operation Code Group Mnemonic Operand Bit reg8, CLR1 manipu- lation mem8, reg16, mem16, ...
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Operation Code Group Mnemonic Operand Shift SHL reg reg mem,1 1 ...
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Operation Code Group Mnemonic Operand Shift reg reg SHR mem,1 1 ...
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Operation Code Group Mnemonic Operand Rotate ROL reg reg mem,1 1 ...
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Operation Code Group Mnemonic Operand Rotate reg reg ROLC mem,1 1 ...
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Operation Code Group Mnemonic Operand Rotate RORC reg reg mem,1 1 ...
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Operation Code Group Mnemonic Operand Sub- near-proc CALL routine control regptr16 ...
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Operation Code Group Mnemonic Operand Stack mem16 PUSH manipu- lation reg16 reg sreg sreg 1 1 ...
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Operation Code Group Mnemonic Operand Condi- short-label tional branch BNV short-label ...
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Operation Code Group Mnemonic Operand Interrupt BRK imm8 ...
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Operation Code Group Mnemonic Operand CPU HALT control STOP Note ...
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Number of Clocks Table (1) Legend The number of clocks, for memory operand, differs among addressing modes. So, use the following values for “EA” items shown in Table 2-9 Number of Clocks. Table 2-8. Number of Clocks for Each ...
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Number of clocks Table 2-9. Number of Clocks (1/10) Group Mnemonic Operands Data MOV reg, reg’ transfer mem, reg reg, mem mem, imm reg, imm acc, dmem dmem, acc sreg, reg16 sreg, mem16 reg16, sreg mem16, sreg DS0, reg16, ...
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Group Mnemonic Operands Note 1 Primitive CMPM dst-block block src-block Note 2 transfer Note 1 LDM src-block Note 2 Note 1 STM dst-block Note 2 Bit field INS reg8, reg8’ manipula- reg8, imm4 tion EXT reg8, reg8’ reg8, imm4 I/O ...
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Table 2-9. Number of Clocks (3/10) Group Mnemonic Operands Addition/ SUB reg, reg’ subtraction mem, reg reg, mem reg, imm mem, imm acc, imm SUBC reg, reg’ mem, reg reg, mem reg, imm mem, imm acc, imm Note BCD ADD4S ...
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Group Mnemonic Operands Multiplica- MUL reg8 tion mem8 reg16 mem16 reg16, (reg16’,) imm8 reg16, mem16, imm8 reg16, (reg16’,) imm16 reg16, mem16, imm16 Unsigned DIVU reg8 division mem8 reg16 mem16 Signed DIV reg8 division mem8 reg16 mem16 BCD ADJBA adjustment ADJ4A ...
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Table 2-9. Number of Clocks (5/10) Group Mnemonic Operands Comple NOT reg ment mem operation NEG reg mem Logical TEST reg, reg’ operation mem, reg/ reg, mem reg, imm mem, imm acc, imm AND reg, reg’ mem, reg reg, mem ...
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Group Mnemonic Operands Bit NOT1 mem16, CL manipula- reg8, imm3 tion mem8, imm3 reg16, imm4 mem16, imm4 NOT1 CY Bit CLR1 reg8, CL manipula- mem8, CL tion reg16, CL mem16, CL reg8, imm3 mem8, imm3 reg16, imm4 mem16, imm4 SET1 ...
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Table 2-9. Number of Clocks (7/10) Group Mnemonic Operands Shift SHR reg, CL mem, CL Note reg, imm8 mem, imm8 SHRA reg,1 mem, 1 reg, CL mem, CL Note reg, imm8 mem, imm8 Rotate ROL reg,1 mem, 1 reg, CL ...
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Group Mnemonic Operands Rotate RORC reg, CL mem, CL Note 1 reg, imm8 mem, imm8 Subroutine CALL near-proc control regptr16 memptr16 far-proc memptr32 RET pop-value pop-value Stack PUSH mem16 manipula- reg16 tion sreg PSW R imm8 imm16 POP mem16 reg16 ...
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Table 2-9. Number of Clocks (9/10) Group Mnemonic Operands Branch BR near-label short-label regptr16 memptr16 far-label memptr32 Conditional BV short-label branch Note BNV short-label BC/BL short-label BNC/BNL short-label BE/BZ short-label BNE/BNZ short-label BNH short-label BH short-label BN short-label BP short-label ...
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Table 2-9. Number of Clocks (10/10) Group Mnemonic Operands Register BRKCS reg16 bank switch TSKSW reg16 CPU HALT control STOP POLL DI EI BUSLOCK FPO1 fp-op fp-op, mem FPO2 fp-op fp-op, mem NOP Segment override prefix (DS0:, DS1:, PS: and ...
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ELECTRICAL SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS (T Parameter Supply Voltage Input Voltage Output Voltage Output Current Low Output Current High Operating Ambient Temperature Storage Temperature Cautions 1. Do not make direct connections of the output (or input/output) pins of the ...
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OSCILLATOR CHARACTERISTICS PD70325 – PD70325- – Resonator Recommended Circuit Ceramic or Crystal Resonator X1 C1 External Clock 1 X1 HCMOS Inverter HCMOS Inverter ...
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CAPACITANCE ( Parameter Symbol Input Capacitance C I Output Capacitance C O Input/output Capacitance CHARACTERISTICS PD70325 – PD70325- –10 ...
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Parameter Address Delay Time from CLKOUT Data Input Delay Time from Address Data Delay Time from MREQ Data Delay Time from MSTB MSTB Delay Time from MREQ MREQ Low-Level Width Address Hold Time (from MREQ ↑) Data Input Hold Time ...
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Parameter READY Hold Time (from MREQ ↓, IOSTB ↓) HLDRQ Setup Time (to CLKOUT ↑) HLDAK ↓ Delay Time from CLKOUT ↑ HLDAK ↓ Delay Time from Bus Float Bus Output Delay Time from HLDAK ↑ HLDAK ↑ Delay Time ...
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PD70325- – Parameter X1 Input Cycle Time X1 Input High-/Low-Level Width X1 Input Rise/Fall Time CLKOUT Output Cycle Time CLKOUT Output High-/Low-Level Width t CLKOUT Output Rise/Fall Time Input Rise/Fall ...
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Parameter RESET Low-Level Width READY Setup Time (to MREQ ↓, IOSTB ↓) READY Hold Time (from MREQ ↓, IOSTB ↓) HLDRQ Setup Time (to CLKOUT ↑) HLDAK ↓ Delay Time from CLKOUT ↑ HLDAK ↓ Delay Time from Bus Float ...
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COMPARATOR CHARACTERISTICS ° µ PD70325 – ° µ PD70325- – Parameter Symbol Comparator Accuracy V ACOMP Threshold Voltage V TH Compare Time t COMP PT Input ...
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DATA HOLDING TIMING t FVD AC TEST INPUT WAVEFORM (Except RESET, NMI, X1 and X2) 2 TEST INPUT WAVEFORM (RESET, NMI, X1 and X2 IFS AC TEST OUTPUT ...
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CLOCK TIMING CLKOUT t KR POLL INPUT TIMING CLKOUT t SPLK POLL CTS0 AND CTS1 INPUT TIMING CTS0 and CTS1 58 t CYX t t WXH WXL CYK t t WKH WKL t KF ...
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INTERRUPT INPUT/DMA INPUT TIMING CLKOUT NMI t SIQK Note Note INTP0 to INTP2, DMARQ0 to DMARQ1 RESET INPUT TIMING When STOP mode is released/at power-on reset: Hi-Z CLKOUT Note t WRSL1 RESET Note CLKOUT signal is output after CLKOUT output ...
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READY TIMING When 2 wait states are inserted: T1 Note 1 MREQ Note 2 IOSTB t HCRY0 t SCRY0 READY When (n – 2) extra wait states are inserted [n T1 TAW Note 1 MREQ IOSTB Note 2 t HCRY ...
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SERIAL OPERATION When transmitting data in I/O interface mode SCK0 TxD When receiving data in I/O interface mode CTS0 RxD t CYTK t t WSTL WSTH t DTKD t CYRK t t WSRL WSRH t SRDK t HKRD µ PD70325 ...
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READ OPERATION t CYK CLKOUT t DKA A19 Hi DAMR MREQ MSTB t DAMS IOSTB REFRQ DMAAK1 to DMAAK0 62 t DKA t DADR HMA t DMRD t HMDR t t ...
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WRITE OPERATION t CYK CLKOUT t DKA A19 DADW Hi DAMR MREQ MSTB t DAMS IOSTB REFRQ DMAAK1 to DMAAK0 t DKA t HMA Hi-Z t SDM t HMDW t t ...
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I/O READ TIMING t CYK CLKOUT t DKA A19 DADR Hi MREQ H MSTB t DAIS IOSTB REFRQ DMAAK1 to DMAAK0 64 t DKA t HISA t DISD t HISDR t t ...
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I/O WRITE TIMING t CYK CLKOUT t DKA A19 DADW Hi MREQ H MSTB t DAIS IOSTB REFRQ DMAAK1 to DMAAK0 t DKA t HISA Hi-Z t SDIS t HISDW t t ...
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DMA (I/O → MEMORY) TIMING t CYK CLKOUT t DKA A19 DAMR MREQ MSTB t DAMS IOSTB DMARQ1 to DMARQ0 DMAAK1 to DMAAK0 TC1 to TC0 66 Hi WMRL HMA ...
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DMA (MEMORY → I/O) TIMING t CYK CLKOUT t DKA A19 DAMR MREQ MSTB t DAMS IOSTB DMARQ1 to DMARQ0 DMAAK1 to DMAAK0 TC1 to TC0 Hi WMRL HMA t ...
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REFRESH TIMING t CYK CLKOUT t DKA A19 MREQ H MSTB IOSTB t DARF REFRQ DMAAK1 to DMAAK0 68 Hi WRFL HRFA t RVC µ PD70325 ...
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HOLD REQUEST/ACKNOWLEDGE TIMING Normal mode CLKOUT t SHQK HLDRQ Note HLDAK Releasing HOLD mode at refreshing time CLKOUT HLDRQ Note t DKHA HLDAK Note A19 to A0 D0, MREQ, MSTB, IOSTB, R/W EXTERNAL INTERRUPT REQUEST/ACKNOWLEDGE TIMING CLKOUT t ...
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CLOCK SYNCHRONIZATION TIMING The V25 Family is designed to create access signals to memory and I/O, based on the MREQ signal and IOSTB signal. When V25 Family products are connected with memory and I/O, design is possible even if there ...
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READY TIMING When 2 wait states are inserted: T1 CLKOUT A19 to A0 MREQ IOSTB t SRYK READY When 1 extra wait state is inserted: T1 CLKOUT A19 to A0 MREQ IOSTB t SRYK READY TAW TAW t HKRY TAW ...
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MEMORY READ OPERATION t CYK CLKOUT t DKA A19 R/W MREQ MEMORY WRITE OPERATION t CYK CLKOUT t DKA A19 R/W MREQ 72 t DKA t HKD t ...
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I/O READ TIMING CLKOUT A19 R/W MREQ IOSTB I/O WRITE TIMING CLKOUT A19 R/W MREQ IOSTB t CYK t DKA t t SDK HKD t t DKIS DKIS ...
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PACKAGE DRAWINGS 94 PIN PLASTIC QFP ( 20 NOTE Each lead centerline is located within 0.15 mm (0.006 inch) of its true position (T.P.) at maximum material condition ...
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PIN PLASTIC QFJ ( 1150 mil NOTE Each lead centerline is located within 0.12 mm (0.005 inch) of its true position (T.P.) at maximum material condition P84L-50A3-2 ...
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RECOMMENDED SOLDERING CONDITIONS The following conditions must be met when soldering this product. For more details, refer to our document “SEMICONDUCTOR DEVICE MOUNTING TECHNOLOGY MANUAL” (C10535E). Please consult with our sales office when using other soldering process or under ...
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PD70325 77 ...
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NOTES FOR CMOS DEVICES 1 PRECAUTION AGAINST ESD FOR SEMICONDUCTORS Note: Strong electric field, when exposed to a MOS device, can cause destruction of the gate oxide and ultimately degrade the device operation. Steps must be taken to stop generation ...
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Regional Information Some information contained in this document may vary from country to country. Before using any NEC product in your application, please contact the NEC office in your country to obtain a list of authorized representatives and distributors. They ...
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Related documents V25+, V35+ User's Manual — Hardware V25, V35 Family User's Manual — Instructions Reference document Electrical Characteristics for Microcomputer The related documents indicated in this publication may include preliminary versions. However, preliminary versions are not marked as such. ...