AT89C55-24PC ATMEL Corporation, AT89C55-24PC Datasheet
AT89C55-24PC
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AT89C55-24PC Summary of contents
Page 1
... The on-chip Flash allows the program memory to be reprogrammed in-system conventional nonvolatile memory programmer. By combining a versatile 8-bit CPU with Flash on a monolithic chip, the Atmel AT89C55 is a powerful microcomputer which provides a highly flexible and cost effective solution to many embedded control applications. Pin Configurations ...
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... Block Diagram V CC GND RAM ADDR. REGISTER B REGISTER PSEN TIMING ALE/PROG INSTRUCTION AND REGISTER CONTROL PP RST OSC AT89C55 4-170 P0.0 - P0.7 PORT 0 DRIVERS PORT 0 PORT 2 RAM LATCH LATCH ACC TMP2 TMP1 ALU INTERRUPT, SERIAL PORT, AND TIMER BLOCKS PSW PORT 1 LATCH PORT 1 DRIVERS P1 ...
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... As inputs, Port 3 pins that are externally being pulled low will source current (I ) because of the pullups. IL Port 3 also serves the functions of various special features of the AT89C55, as shown in the following table. Port Pin Alternate Functions P3.0 RXD (serial input port) P3.1 TXD (serial output port) P3 ...
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... PSEN Program Store Enable is the read strobe to external pro- gram memory. When the AT89C55 is executing code from external pro- gram memory, PSEN is activated twice each machine cycle, except that two PSEN activations are skipped during each access to external data memory. ...
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... Table 1. AT89C55 SFR Map and Reset Values 0F8H B 0F0H 00000000 0E8H ACC 0E0H 00000000 0D8H PSW 0D0H 00000000 T2CON T2MOD 0C8H 00000000 XXXXXX00 0C0H IP 0B8H XX000000 P3 0B0H 11111111 IE 0A8H 0X000000 P2 0A0H 11111111 SCON SBUF 98H 00000000 XXXXXXXX P1 90H 11111111 TCON TMOD ...
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... Capture/Reload select. CP/RL2 = 1 causes captures to occur on negative transitions at T2EX if EXEN2 = 1. CP/RL2 = 0 causes automatic reloads to occur when Timer 2 overflows or negative transitions occur at T2EX when EXEN2 = 1. When either RCLK or TCLK = 1, this bit is ignored and the timer is forced to auto-reload on Timer 2 overflow. AT89C55 4-174 EXF2 ...
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... Timer 0 and 1 Timer 0 and Timer 1 in the AT89C55 operate the same way as Timer) and Timer 1 in the AT89C51 and AT89C52. For further information, see the Microcontroller Data Book, sec- tion titled, “Timer/Counters.” Timer 2 Timer bit Timer/Counter that can operate as either a timer or an event counter ...
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... T20E Timer 2 Output Enable bit. DCEN When set, this bit allows Timer configured as an up/down counter. AT89C55 4-176 RCAP2H and RCAP2L to be reloaded into the timer regis- ters, TH2 and TL2, respectively. A logic 0 at T2EX makes Timer 2 count down. The timer underflows when TH2 and TL2 equal the values stored in RCAP2H and RCAP2L ...
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Figure 3. Timer 2 Auto Reload Mode (DCEN = 1) ÷ 12 OSC C/ C/ PIN Figure 4. Timer 2 in Baud Rate Generator Mode (DOWN COUNTING RELOAD VALUE) 0FFH 0FFH OVERFLOW TH2 TL2 CONTROL ...
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... As a baud rate generator, however, it increments every state time (at 1/2 the oscillator fre- quency). The baud rate formula is given below. Figure 5. Timer 2 in Clock-Out Mode AT89C55 4-178 Modes 1 and 3 -------------------------------------- - Baud Rate where (RCAP2H, RCAP2L) is the content of RCAP2H and RCAP2L taken bit unsigned integer ...
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... Microcontroller Data Book, section titled, “Serial Interface.” Interrupts The AT89C55 has a total of six interrupt vectors: two exter- nal interrupts (INT0 and INT1), three timer interrupts (Tim- ers 0, 1, and 2), and the serial port interrupt. These inter- rupts are all shown in Figure 6. ...
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... Status of External Pins During Idle and Power Down Modes Mode Program Memory Idle Internal Idle External Power Down Internal Power Down External AT89C55 4-180 Figure 7. Oscillator Connections Note: C1, for Crystals = 40 pF for Ceramic Resonators Figure 8. External Clock Drive Configuration ALE ...
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... Programming Algorithm: Before programming the AT89C55, the address, data and control signals should be set up according to the Flash programming mode table and Figures 9 and 10. To program the AT89C55, take the fol- lowing steps: 1. Input the desired memory location on the address lines. 2. Input the appropriate data byte on the data lines. ...
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... Data Polling: The AT89C55 features Data Polling to indi- cate the end of a write cycle. During a write cycle, an attempted read of the last byte written will result in the com- plement of the written data on PO.7. Once the write cycle has been completed, true data is valid on all outputs, and the next cycle may begin ...
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Flash Programming Modes Mode Write Code Data Read Code Data Bit-1 Write Lock Bit-2 Bit-3 Chip Erase Read Signature Byte Note: 1. Chip Erase requires a 10-ms PROG pulse. RST PSEN ALE/PROG ...
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... Address to Data Valid AVQV t ENABLE Low to Data Valid ELQV t Data Float After ENABLE EHQZ t PROG High to BUSY Low GHBL t Byte Write Cycle Time WC Note: 1. Only used in 12-volt programming mode. AT89C55 4-184 Min 11.5 3 48t CLCL 48t CLCL 48t CLCL 48t CLCL 48t PP CLCL ...
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Flash Programming and Verification Waveforms - High Voltage Mode (V Flash Programming and Verification Waveforms - Low Voltage Mode (V = 12V 5V) PP 4-185 ...
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... Pins are not guaranteed to sink current greater than the listed OL test conditions. 2. Minimum V for Power Down is 2V. CC AT89C55 4-186 *NOTICE: Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent dam- age to the device. This is a stress rating only and ...
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AC Characteristics Under operating conditions, load capacitance for Port 0, ALE/PROG, and PSEN = 100 pF; load capacitance for all other outputs = 80 pF. External Program and Data Memory Characteristics Symbol Parameter 1/t Oscillator Frequency CLCL t ALE Pulse ...
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... External Program Memory Read Cycle External Data Memory Read Cycle AT89C55 4-188 ...
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External Data Memory Write Cycle External Clock Drive Waveforms External Clock Drive Symbol Parameter 1/t Oscillator Frequency CLCL t Clock Period CLCL t High Time CHCX t Low Time CLCX t Rise Time CLCH t Fall Time CHCL Min Max ...
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... Shift Register Mode Timing Waveforms AC Testing Input/Output Waveforms Note Inputs during testing are driven at V logic 1 and 0.45V for a logic 0. Timing measurements are made at V min. for a logic 1 and V IH logic 0. AT89C55 4-190 = 5.0V 20% and Load Capacitance = 80 pF. CC 10t 2t Float Waveforms (1) - 0.5V for a ...
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Notes: 1. XTAL1 tied to GND for Lock bits programmed (power down) 4-191 ...
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... Lead, 0.600" Wide, Plastic Dual Inline Package (PDIP) 44Q 44 Lead, Plastic Gull Wing Quad Flatpack (PQFP) AT89C55 4-192 Ordering Code AT89C55-16AA AT89C55-16JA AT89C55-16PA AT89C55-16QA AT89C55-24AC AT89C55-24JC AT89C55-24PC AT89C55-24QC AT89C55-24AI AT89C55-24JI AT89C55-24PI AT89C55-24QI AT89C55-33AC AT89C55-33JC AT89C55-33PC AT89C55-33QC Package Type Package Operation Range ...