AD7896 Analog Devices, AD7896 Datasheet

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AD7896

Manufacturer Part Number
AD7896
Description
2.7 V to 5.5 V, 12-Bit, 8 µs ADC in 8-Pin SO/DIP
Manufacturer
Analog Devices
Datasheet

Specifications of AD7896

Resolution (bits)
12bit
# Chan
1
Sample Rate
100kSPS
Interface
Ser
Analog Input Type
SE-Uni
Ain Range
Uni Vdd
Adc Architecture
SAR
Pkg Type
DIP,SOIC

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*Patent Pending
REV. C
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective companies.
so that no external reference is required.
The AD7896 features a high sampling rate mode and, for low
power applications, a proprietary automatic power-down mode
where the part automatically goes into power-down once conver-
sion is complete and “wakes up” before the next conversion cycle.
The part is available in a small, 8-lead, 0.3'' wide, plastic or
hermetic dual-in-line package (PDIP) and in an 8-lead, small
outline IC (SOIC).
GENERAL DESCRIPTION
The AD7896 is a fast, 12-bit ADC that operates from a single
2.7 V to 5.5 V supply and is housed in small 8-lead PDIP and
8-lead SOIC packages. The part contains an 8 µs successive
approximation ADC, an on-chip track-and-hold amplifier, an
on-chip clock, and a high speed serial interface.
Output data from the AD7896 is provided via a high speed,
serial interface port. This 2-wire serial interface has a serial
clock input and a serial data output with the external serial
clock accessing the serial data from the part.
In addition to the traditional dc accuracy specifications, such as
linearity, full-scale, and offset errors, the AD7896 is also speci-
fied for dynamic performance parameters, including harmonic
distortion and signal-to-noise ratio.
The part accepts an analog input range of 0 V to V
from a single 2.7 V to 5.5 V supply, consuming only 9 mW
typical. The V
FEATURES
100 kHz Throughput Rate
Fast 12-Bit Sampling ADC with 8 s Conversion Time
8-Lead PDIP and SOIC
Single 2.7 V to 5.5 V Supply Operation
High Speed, Easy-to-Use Serial Interface
On-Chip Track-and-Hold Amplifier
Analog Input Range Is 0 V to Supply
High Input Impedance
Low Power: 9 mW Typ
DD
input is also used as the reference for the part
DD
and operates
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
Fax: 781/326-8703
PRODUCT HIGHLIGHTS
1. Complete, 12-bit ADC in an 8-Lead Package.
2. Low Power, Single-Supply Operation.
3. High Speed Serial Interface.
The AD7896 contains an 8 µs ADC, a track-and-hold ampli-
fier, control logic, and a high speed serial interface, all in an
8-lead PDIP. The V
part, so no external reference is needed. This offers consider-
able space saving over alternative solutions.
The AD7896 operates from a single 2.7 V to 5.5 V supply
and consumes only 9 mW typical. The automatic power-
down mode, where the part goes into power down once
conversion is complete and “wakes up” before the next con-
version cycle, makes the AD7896 ideal for battery-powered
or portable applications.
The part provides high speed serial data and serial clock lines
allowing for an easy, 2-wire serial interface arrangement.
CONVST
2.7 V to 5.5 V, 12-Bit, 8 s
V
ADC in 8-Lead SOIC/PDIP
FUNCTIONAL BLOCK DIAGRAM
IN
AD7896
AGND
© 2003 Analog Devices, Inc. All rights reserved.
DD
TRACK-AND-HOLD
input is used as the reference for the
DGND
CLOCK
BUSY
SCLK
AD7896
REGISTER
OUTPUT
12-BIT
ADC
V
DD
www.analog.com
SDATA
*

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AD7896 Summary of contents

Page 1

... This offers consider- able space saving over alternative solutions. 2. Low Power, Single-Supply Operation. The AD7896 operates from a single 2 5.5 V supply and consumes only 9 mW typical. The automatic power- down mode, where the part goes into power down once conversion is complete and “ ...

Page 2

... AD7896–SPECIFICATIONS Parameter 2 DYNAMIC PERFORMANCE Signal-to-(Noise + Distortion) Ratio @ 25° MIN MAX 3 Total Harmonic Distortion (THD) 3 Peak Harmonic or Spurious Noise 3 Intermodulation Distortion (IMD) Second Order Terms Third Order Terms DC ACCURACY Resolution Minimum Resolution for Which No Missing Codes Are Guaranteed 3 Relative Accuracy ...

Page 3

... µA max 2 3 µA max = 5 V ± 10 µA max = 5 V ± 10% 500 V DD µW max 13 2 ± 10 and timed from a voltage level of 1 and the setup time required for the user’s 4 AD7896 ...

Page 4

... ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD7896 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality ...

Page 5

... SCLK Serial Clock Input. An external serial clock is applied to this input to obtain serial data from the AD7896. A new serial data bit is clocked out on the falling edge of this serial clock. Data is guaranteed valid for 10 ns after this falling edge so data can be accepted on the falling edge when a fast serial clock is used. ...

Page 6

... The theoretical signal-to-(noise + distortion) ratio for an ideal N-bit converter with a sine wave input is given by: Signal-to-(Noise + Distortion) = (6.02N + 1.76) dB Thus, for a 12-bit converter, this is 74 dB. Total Harmonic Distortion Total harmonic distortion (THD) is the ratio of the rms sum of harmonics to the fundamental. For the AD7896 defined as THD ...

Page 7

... The conversion clock for the part is generated inter- nally using a laser-trimmed clock oscillator circuit. Conversion time for the AD7896 is 8 µs in the high sampling mode (14 µs for the auto sleep mode), and the track-and-hold acquisition time is 1.5 µs. To obtain optimum performance from the part, the read operation should not occur during the conversion or during 400 ns prior to the next conversion ...

Page 8

... CONVST, and new data from this conversion is available in the output register of the AD7896. A read operation accesses this data. This read operation consists of 16 clock cycles, and the length of this read operation depends on the serial clock frequency. For the fastest throughput rate (with a serial clock of 10 MHz opera- tion), the read operation will take 1.6 µ ...

Page 9

... The serial clock input does not need to be continuous during the serial read operation. The 16 bits of data (four leading zeros and 12-bit conversion result) can be read from the AD7896 in a number of bytes. However, the SCLK input must remain low between the two bytes. ...

Page 10

... AD7896. A simple AND function on this port bit and the serial clock from the 8X51/L51 will provide this function. The port bit should be high to select the AD7896 and low when it is not selected ...

Page 11

... AD7896. The histogram plot for 8192 conversions of the same dc input now shows a larger spread of codes with the rms noise for the AD7896 increasing to 279 µV. This effect will vary depending on where the serial clock edges appear with respect to the bit trials of the conversion process ...

Page 12

... AD7896 from /2. The sampling frequency SAMPLING is 102.4 kHz. The plot shows that the AD7896 converts an input sine wave of 51.2 kHz to an effective numbers of bits of 11.25, which equates to a signal-to-(noise + distortion) level of 69 dB. 12.00 11 ...

Page 13

... SEATING 0.10 0.17 (0.0067) PLANE COMPLIANT TO JEDEC STANDARDS MS-012AA CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN –13– AD7896 (Q-8) Dimensions shown in inches and (millimeters) 0.005 (0.13) 0.055 (1.40) MIN MAX 8 5 0.310 (7.87) PIN 1 0 ...

Page 14

... AD7896 Revision History Location 7/03—Data Sheet changed from REV REV. C. Changes to SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Changes to Figure Edits to ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Added ESD Warning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Updated OUTLINE DIMENSIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 –14– Page REV. C ...

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