UPD70320L NEC, UPD70320L Datasheet
UPD70320L
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UPD70320L Summary of contents
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SINGLE-CHIP MICROCONTROLLER The PD70320 (V25 single-chip microcontroller on which 16-bit CPU, RAM, serial interface, timer, DMA controller, interrupt controller, etc. are all integrated. The PD70320 is compatible with the 8/16-bit microprocessor TM PD70108/ 70116 (V20 /V30 The ...
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ORDERING INFORMATION Part Number PD70320L 84-pin plastic QFJ (1150 PD70320L-8 84-pin plastic QFJ (1150 PD70320GJ-5BG 94-pin plastic QFP (20 PD70320GJ-8-5BG 94-pin plastic QFP (20 Remark The plastic QFJ is a new name of the PLCC. 2 Package Max. Operating Frequency ...
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... A9 30 A10 31 A11 Cautions 1. Connect IC pin individually Connect EA pin to GND via a resistor ( IC: Internally Connected via a resistor ( ...
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... P21/DMAAK0 P22/TC0 Cautions 1. Connect IC pin individually Connect EA pin to GND via a resistor ( via a resistor ( PD70320 P05 ...
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P20/DMARQ0 LC P21/DMAAK0 PROGRAMMABLE etc. P22/TC0 DMA P23/DMARQ1 CONTROLLER P24/DMAAK1 PSW P25/TC1 PC TxD0 SERIAL RxD0 INTERFACE P16/SCK0 CTS0 TxD1 BAUD RATE RxD1 GENERATOR CTS1 P10/NMI PROGRAMMABLE P11/INTP0 P12/INTP1 INTERRUPT P13/INTP2/INTAK CONTROLLER P14/INT/POLL TIME BASE 16-BIT TIMER COUNTER TOUT/P15 REFRQ ...
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PIN FUNCTIONS .................................................................................................................................. 7 1.1 Port Pins ....................................................................................................................................................... 7 1.2 Non-port Pins ............................................................................................................................................... 8 2. INSTRUCTION SETS ........................................................................................................................... 9 2.1 Instructions Added to PD70108/70116 .................................................................................................... 9 2.2 Instruction Set Operation ......................................................................................................................... 11 2.3 Instruction Set Table ................................................................................................................................. 15 3. ...
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PIN FUNCTIONS 1.1 Port Pins Pin Name Input/Output P00 to P06 Input & output P07/CLKOUT Input & output/output P10/NMI Input P11/INTP0 P12/INTP1 P13/INTP2/INTAK Input/input/output P14/POLL/INT Input & output/input/input P15/TOUT Input & output/output P16/SCK0 P17/READY Input & output/input P20/DMARQ0 Input ...
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... V Input Comparator reference voltage input TH RESET Reset signal input EA External memory access (connect to GND via a resistor ( Input Used to connect crystal resonator/ceramic resonator for oscillating system clock. External clock is entered by entering reverse phase clock to both X1 and X2 pins Input & output ...
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INSTRUCTION SETS The PD70320 instruction sets are upward-compatible with those of PD70108/70116 in native mode. 2.1 Instructions Added to PD70108/70116 The following instructions are newly added to the PD70108/70116. (1) Conditional branch instruction • BTCLR ······· Bit test instruction ...
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Register bank switch instructions • BRKCS ······ Used to switch register banks A register bank is switched to the register bank indicated by the lower 3 bits in the 16-bit register described in the operand. The program is also ...
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Instruction Set Operation Identifier reg 8-/16-bit general register reg8 8-bit general register reg16 16-bit general register dmem 8-/16-bit memory location mem 8-/16-bit memory location mem8 8-bit memory location mem16 16-bit memory location mem32 32-bit memory location sfr 8-bit special ...
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Identifier W Byte/word specification bit (0: byte, 1: word). However, when the sign extended byte data should be 16-bit operand even when reg Register field (000 to 111) mem Memory field (000 to 111) ...
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Table 2-3. Operation Identifier (2/2) Identifier temp Temporary register (8/16/32 bits) tmpcy Temporary carry flag (1 bit) seg Immediate segment data (16 bits) offset Immediate offset data (16 bits) Transfer direction + Addition – Subtraction Multiplication Division % Modulo AND ...
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Table 2-6. Segment Register Selection The number of clocks, for memory operand, differs among addressing modes. So, use the following values for “EA” items shown in Table 2-8 Number of Clocks. Table 2-7. Number of Clocks for Each Memory Addressing ...
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Operation Code Group Mnemonic Operand Data reg,reg reg reg MOV transfer mem,reg 1 0 ...
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Operation Code Group Mnemonic Operand Repeat REPC prefix ...
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Operation Code Group Mnemonic Operand Bit field INS reg8,reg8 ...
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Operation Code Group Mnemonic Operand Addi- ADD reg,reg reg tion/ subtrac- mem,reg 0 0 ...
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Operation Code Group Mnemonic Operand BCD ADD4S opera- ...
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Operation Code Group Mnemonic Operand Multipli- MULU reg8 reg cation mem8 ...
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Operation Code Group Mnemonic Operand Unsign- DIVU reg8 reg ed division ...
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Operation Code Group Mnemonic Operand Signed reg8 reg DIV division mem8 ...
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Operation Code Group Mnemonic Operand BCD ADJBA adjust- ment ADJ4A ...
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Operation Code Group Mnemonic Operand Logical reg,reg reg TEST opera- mem,reg tion 1 0 ...
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Operation Code Group Mnemonic Operand Bit TEST1 reg8, reg manipu- lation ...
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Operation Code Group Mnemonic Operand Bit reg8, reg CLR1 manipu- lation ...
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Operation Code Group Mnemonic Operand Shift SHL reg reg mem,1 1 ...
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Operation Code Group Mnemonic Operand Shift SHR reg reg mem,1 1 ...
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Operation Code Group Mnemonic Operand Rotate reg reg ROL mem,1 1 ...
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Operation Code Group Mnemonic Operand Rotate reg reg ROLC mem,1 1 ...
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Operation Code Group Mnemonic Operand Rotate RORC reg reg mem,1 1 ...
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Operation Code Group Mnemonic Operand Sub- CALL near-proc routine control regptr16 ...
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Operation Code Group Mnemonic Operand mem16 mod mem Stack PUSH manipu- lation reg16 ...
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Operation Code Group Mnemonic Operand Condi- BV short-label tional branch BNV short-label ...
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Operation Code Group Mnemonic Operand Interrupt BRK imm8 ...
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Operation Code Group Mnemonic Operand CPU HALT control STOP ...
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Table 2-8. Number of Clocks (1/10) Group Mnemonic Operands Data MOV reg, reg transfer mem, reg reg, mem mem, imm reg, imm acc, dmem dmem, acc sreg, reg16 sreg, mem16 reg16, sreg mem16, sreg DS0, reg16, mem32 DS1, reg16, mem32 ...
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Group Mnemonic Operands Primitive CMPM Note 1 dst-block block src-block transfer Note 1 LDM src-block STM Note 1 dst-block Bit field INS reg8, reg8 manipula- reg8, imm4 tion EXT reg8, reg8 reg8, imm4 I/O IN Note 2 acc, imm8 acc, ...
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Table 2-8. Number of Clocks (3/10) Group Mnemonic Operands Addition/ SUB reg, reg subtraction mem, reg reg, mem reg, imm mem, imm acc, imm SUBC reg, reg mem, reg reg, mem reg, imm mem, imm acc, imm BCD ADD4S Note ...
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Group Mnemonic Operands Multiplica- MUL reg8 tion mem8 reg16 mem16 reg16, (reg16,) imm8 reg16, mem16, imm8 reg16, (reg16,) imm16 reg16, mem16, imm16 Unsigned DIVU reg8 division mem8 reg16 mem16 Signed DIV reg8 division mem8 reg16 mem16 BCD ADJBA adjustment ADJ4A ...
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Table 2-8. Number of Clocks (5/10) Group Mnemonic Operands Comple NOT reg ment mem operation NEG reg mem Logical TEST reg, reg operation mem, reg/ reg, mem reg, imm mem, imm acc, imm AND reg, reg mem, reg reg, mem ...
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Group Mnemonic Operands Bit NOT1 mem16, CL manipula- reg8, imm3 tion mem8, imm3 reg16, imm4 mem16, imm4 NOT1 CY Bit CLR1 reg8, CL manipula- mem8, CL tion reg16, CL mem16, CL reg8, imm3 mem8, imm3 reg16, imm4 mem16, imm4 SET1 ...
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Table 2-8. Number of Clocks (7/10) Group Mnemonic Operands Shift SHR reg, CL Note mem, CL reg, imm8 mem, imm8 SHRA reg,1 Note mem, 1 reg, CL mem, CL reg, imm8 mem, imm8 Rotate ROL reg,1 Note mem, 1 reg, ...
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Group Mnemonic Operands Rotate RORC reg, CL Note mem, CL reg, imm8 mem, imm8 Subroutine CALL near-proc control regptr16 memptr16 far-proc memptr32 RET pop-value pop-value Stack PUSH mem16 manipula- reg16 tion sreg PSW R imm8 imm16 POP mem16 reg16 sreg ...
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Table 2-8. Number of Clocks (9/10) Group Mnemonic Operands Branch BR near-label short-label regptr16 memptr16 far-label memptr32 Conditional BV short-label branch BNV short-label BC/BL short-label BNC/BNL short-label BE/BZ short-label BNE/BNZ short-label BNH short-label BH short-label BN short-label BP short-label BPE ...
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Table 2-8. Number of Clocks (10/10) Group Mnemonic Operands Register BRKCS reg16 bank switch TSKSW reg16 CPU HALT control STOP POLL DI EI BUSLOCK FPO1 fp-op fp-op, mem FPO2 fp-op fp-op, mem NOP Segment override prefix (DS0:, DS1:, PS: and ...
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... Output Current High Operating Ambient Temperature Storage Temperature Cautions 1. Do not make direct connections of the output (or input/output) pins of the IC product with each other, and also avoid direct connections to V the open collector pins can be directly connected with each other. For the external circuit designed with the timing specifications so that any collision of the outputs from the pins subject to high-impedance state may be prevented, direct connection can be also made ...
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OSCILLATOR CHARACTERISTICS (T = – +5 Resonator Recommended Circuit Ceramic or Crystal Resonator X1 C1 External Clock 1 X1 HCMOS Inverter HCMOS Inverter Cautions 1. Mount the ...
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RECOMMENDED OSCILLATOR CONSTANT Ceramic resonator Manufacturer Part Number Kyocera Corp. KBR-10.0M Note 1 Murata Mfg. Co., Ltd. CSA7.37MT040 CSA10.0MT Note 1 Note 2 CSA11.0MT CSA16.0MX040 TDK FCR10.0M2S Note 2 Note 2 FCR16.0M2S Note 2 FCR16.0M2G Notes 1. The operating ambient ...
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CAPACITANCE ( Parameter Symbol Input Capacitance C I Output Capacitance C O Input/output Capacitance CHARACTERISTICS (T = – + Parameter Symbol Input Voltage ...
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Parameter Address Delay Time from CLKOUT Data Input Delay Time from Address Data Delay Time from MREQ Data Delay Time from MSTB MSTB Delay Time from MREQ MREQ Low-Level Width Address Hold Time (from MREQ ) Data Input Hold Time ...
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Parameter READY Hold Time (from MREQ , IOSTB ) HLDRQ Setup Time (to CLKOUT ) HLDAK Delay Time from CLKOUT HLDAK Delay Time from Bus Float Bus Output Delay Time from HLDAK HLDAK Delay Time from HLDRQ Bus Output Delay ...
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COMPARATOR CHARACTERISTICS (T Parameter Symbol Comparator Accuracy V ACOMP Threshold Voltage V TH Compare Time t COMP PT Input Voltage V IPT DATA MEMORY STOP MODE LOW SUPPLY VOLTAGE DATA HOLDING CHARACTERISTICS (T = – Parameter ...
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CLOCK TIMING CLKOUT t KR POLL INPUT TIMING CLKOUT t SPLK POLL CTS0 AND CTS1 INPUT TIMING CTS0 and CTS1 54 t CYX t t WXH WXL CYK t t WKH WKL t KF ...
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INTERRUPT INPUT/DMA INPUT TIMING CLKOUT NMI t SIQK Note Note INTP0 to INTP2, DMARQ0 to DMARQ1 RESET INPUT TIMING When STOP mode is released/at power-on reset: CLKOUT Note t WRSL1 RESET Note CLKOUT signal is output after CLKOUT output is ...
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READY TIMING When 2 wait states are inserted: T1 Note 1 MREQ , Note 2 IOSTB t HCRY0 t SCRY0 READY When (n – 2) extra wait states are inserted [n T1 TAW MREQ Note 1 , IOSTB Note 2 ...
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SERIAL OPERATION When transmitting data in I/O interface mode SCK0 TxD When receiving data in I/O interface mode CTS0 RxD t CYTK t t WSTL WSTH t DTKD t CYRK t t WSRL WSRH t SRDK t HKRD PD70320 t ...
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READ OPERATION t CYK CLKOUT t DKA A19 DAMR MREQ MSTB t DAMS IOSTB REFRQ DMAAK1 to DMAAK0 58 t DADR HMA t t DMRD HMDR t t WMRL RVC t ...
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WRITE OPERATION t CYK CLKOUT t DKA A19 DADW DAMR MREQ MSTB t DAMS IOSTB REFRQ DMAAK1 to DMAAK0 t HMA t t SDM HMDW t t WMRL RVC t DMRMS ...
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I/O READ TIMING t CYK CLKOUT t DKA A19 DADR R/W MREQ MSTB t DAIS IOSTB REFRQ DMAAK1 to DMAAK0 60 t HISA t t DISD HISDR t t WISL RVC PD70320 ...
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I/O WRITE TIMING t CYK CLKOUT t DKA A19 DADW MREQ MSTB t DAIS IOSTB REFRQ DMAAK1 to DMAAK0 t HISA t t SDIS HISDW t t WISL RVC PD70320 61 ...
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DMA (I/O MEMORY) TIMING t CYK CLKOUT t DKA A19 DAMR MREQ MSTB t DAMS IOSTB DMARQ1 to DMARQ0 DMAAK1 to DMAAK0 TC1 to TC0 WMRL HMA t t ...
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DMA (MEMORY I/O) TIMING t CYK CLKOUT t DKA A19 R/W t DAMR MREQ MSTB t DAMS IOSTB DMARQ1 to DMARQ0 DMAAK1 to DMAAK0 TC1 to TC0 t t WMRL HMA t RVC t WMSL ...
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REFRESH TIMING t CYK CLKOUT t DKA A19 R/W MREQ MSTB IOSTB t DARF REFRQ DMAAK1 to DMAAK0 WRFL HRFA t RVC PD70320 ...
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HOLD REQUEST/ACKNOWLEDGE TIMING Normal mode CLKOUT t SHQK HLDRQ Note HLDAK Releasing HOLD mode at refreshing time CLKOUT HLDRQ Note t DKHA HLDAK Note A19 to A0 D0, MREQ, MSTB, IOSTB, R/W EXTERNAL INTERRUPT REQUEST/ACKNOWLEDGE TIMING CLKOUT t ...
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CHARACTERISTIC CURVES 140 120 100 DD1 CLK ( ...
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DD1 120 100 MHz CLK MHz CLK MHz CLK MHz CLK 0.5 MHz CLK 0 0 ...
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0.2 0.4 0.6 Output Voltage V – ...
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PACKAGE DRAWINGS 84 PIN PLASTIC QFJ ( 1150 mil NOTE Each lead centerline is located within 0.12 mm (0.005 inch) of its true position (T.P.) at maximum material condition ...
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PIN PLASTIC QFP ( 20 NOTE Each lead centerline is located within 0.15 mm (0.006 inch) of its true position (T.P.) at maximum material condition ...
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RECOMMENDED SOLDERING CONDITIONS The following conditions must be met when soldering this product. For more details, refer to our document “SEMICONDUCTOR DEVICE MOUNTING TECHNOLOGY MANUAL” (C10535E). Please consult with our sales office when using other soldering process or under ...
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... Similar precautions need to be taken for PW boards with semiconductor devices on it. 2 HANDLING OF UNUSED INPUT PINS FOR CMOS Note: No connection for CMOS device inputs can be cause of malfunction connection is provided to the input pins possible that an internal input level may be generated due to noise, etc., hence causing malfunction. CMOS devices behave differently than Bipolar or NMOS devices ...
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... Regional Information Some information contained in this document may vary from country to country. Before using any NEC product in your application, please contact the NEC office in your country to obtain a list of authorized representatives and distributors. They will verify: • Device availability • Ordering information • ...
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... Specific: Aircrafts, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems or medical equipment for life support, etc. The quality grade of NEC devices is "Standard" unless otherwise specified in NEC's Data Sheets or Data Books. If customers intend to use NEC devices for applications other than those specified for Standard quality grade, they should contact an NEC sales representative in advance ...