CSP1027 Agere Systems, CSP1027 Datasheet
CSP1027
Related parts for CSP1027
CSP1027 Summary of contents
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... The device is fabri- cated in low-power CMOS technology and designed for low-voltage (3 5.0 V) digital systems. The CSP1027 is packaged in a 44-pin EIAJ quad flat pack (QFP 48-pin EIAJ thin quad flat pack (TQFP). In the 48-pin TQFP, the CSP1027 occupies a total volume ...
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Cellular Handset and Modem Applications Contents 1 Features ...................................................................................................................................................... 1 2 Description .................................................................................................................................................. 1 3 Pin Information ........................................................................................................................................... 3 4 Architectural Information ............................................................................................................................ 5 4.1 Overview........................................................................................................................................... 6 4.2 Description of Signal Paths............................................................................................................... 6 4.3 Programmable Features ................................................................................................................. 13 4.4 Power-On ...
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... Figure 2. 48-Pin EIAJ Thin Quad Flat Pack (TQFP) Pin Diagram Lucent Technologies Inc. Cellular Handset and Modem Applications CPS1027-J 6 44-PIN QFP CSP1027-S 48-PIN TQFP EIGS 33 32 SMODE2 31 PORCAP 30 PORB 29 RSTB 28 RES 27 RES ...
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Cellular Handset and Modem Applications 3 Pin Information (continued) Functional descriptions of the pins are found in Section 6 on page 30. Table 1. Pin Descriptions QFP Pin TQFP Pin Symbol RES 4 4 ...
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... AND 7th-ORDER MODULATOR U IIR AND GAIN X LOW-PASS ADJUST FILTER DITHER OGSEL HPFE cioc3 cioc0 cioc3 V REG ON-CHIP (3.0 V) VOLTAGE REFERENCE CIRCUITS REFC Figure 3. CSP1027 Block Diagram 8 kHz 1/125 SIO CONTROL HPFE cioc3 STATUS 3rd-ORDER IIR HIGH-PASS FILTER (A/D) MUTE cioc0 ...
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... JDC digital cellular applications. In addition, the small supply current drain, when powered down, extends battery life in mobile communication applica- tions. The CSP1027 is intended for both voice band voice and data communication systems result, this codec has a variety of features not found in standard voice band codecs: 3 ...
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... Cfb Cin Rin EXTERNAL COMPONENTS Figure 5. CSP1027 A/D Path in the External Gain Select Mode (EIGS = 1) 4.2.5 A/D Path Frequency Response The composite digital filters (decimator, LPF, and HPF) meet the ITU-T G.712 voice band frequency response specifications and are suitable for IS-54, JDC, and GSM digital cellular applications. Figures 6 through 9 show the A/D and D/A frequency response without the optional high-pass filter (HPF) ...
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Cellular Handset and Modem Applications 4 Architectural Information –100 –120 Figure 6. A/D or D/A Path Frequency Response Over 5.0 f Figure 7. A/D or D/A Path Frequency Response Over 2 (continued –20 –40 –60 –80 ...
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December 1999 4 Architectural Information Figure 8. A/D or D/A Path Frequency Response Over f –0.2 –0.4 –0.6 –0.8 –1.0 Figure 9. A/D or D/A Path Frequency Response Over 0.5 f Lucent Technologies Inc. Cellular Handset and Modem Applications (continued) ...
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Cellular Handset and Modem Applications 4 Architectural Information Figure 10. A/D or D/A Path Absolute Group Delay (HPF Disabled) Figure 11. A/D or D/A Path Group Delay Distortion (HPF Disabled) 10 (continued ...
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December 1999 4 Architectural Information Figure 12. A/D or D/A Path Frequency Response Over f –0.2 –0.4 –0.6 –0.8 –1.0 Figure 13. A/D or D/A Path Frequency Response Over 0.5 f Lucent Technologies Inc. Cellular Handset and Modem Applications (continued) ...
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Cellular Handset and Modem Applications 4 Architectural Information Figure 14. A/D or D/A Path Absolute Group Delay (HPF Enabled) Figure 15. A/D or D/A Path Group Delay Distortion (HPF Enabled) 12 (continued 0.00 0.05 ...
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... Cellular Handset and Modem Applications 4.3 Programmable Features (continued) 4.3.1 Active/Inactive Modes The CSP1027 has active and inactive modes of opera- tion which are selected by the ACTIVE field in the cioc0 register (see Table 7 on page 26). The default value upon reset and powerup is ACTIVE = 0 (i.e., inactive) ...
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... The DITHER should be enabled if the CSP1027 is used in an audio application, i.e., where this device interfaces to an audio trans- ducer. If the CSP1027 is used in an application other than audio, such as data communications, the DITHER can be disabled if so desired. 4.4 Power-On Reset 4 ...
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December 1999 4 Architectural Information PORCAP C EXTERNAL COMPONENT XOSCEN XLO ENABLE XHI OSCILLATOR CLK Lucent Technologies Inc. Cellular Handset and Modem Applications (continued POWER-ON TSTPOR PULSE GENERATOR RSTB Figure 16. Power-On Reset Diagram CDIFS, CDIF0, CDIF1, ...
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... Section 7.5 on page 45 provides some examples of how to program the clocks. 4.5.1 Crystal Oscillator The CSP1027 has a selectable on-chip clock oscillator. A logic 1 on the XOSCEN pin enables the crystal oscil- lator. A logic 0 disables the oscillator, powers it down, and selects the input buffer connected to the CLK pin. ...
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... CK Lucent Technologies Inc. Cellular Handset and Modem Applications The CSP1027 solves this problem in a unique way, by (continued) providing a programmable, fractional divider, F1 the programmable ratio between ICLK0 and CK ...
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Cellular Handset and Modem Applications 4 Architectural Information The procedure for selecting M, S, and N is illustrated in Section 7.5 on page 45. The ranges for the programmable dividers are summarized in Table 2. Table 2. Programmable Divider Summary ...
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December 1999 4 Architectural Information Table 5. CDIF0, CDIF1, CDIF2 Values for Each N N CDIF0 CDIF1 0 00 0000 00 0000 1 11 1111 00 0000 2 11 1101 00 0010 3 10 1001 00 0010 4 01 1111 ...
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... Bit[15:14] = 00, cioc1: Bit[15:14] = 01, etc.). 4.6.3 Serial I/O Port Overview The CSP1027 serial I/O unit is an asynchronous, full- duplex, double-buffered channel operating Mbits/s that easily interfaces with other Lucent fixed- point DSPs (i.e., DSP16A and DSP1610/1616/1617/ 1618 single or multiple DSP environment ...
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... DO pin. The CSP1027 shifts in the data from the DI pin into its input shift register (isr). A serial transmit address on the SADD line is received simultaneously with data on the DI line ...
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... The DSP can activate the codec by writing the cioc0 register in the CSP1027, and then let- ting its input buffer full flag (IBF) indicate when the CSP1027 has transferred data. This is the preferred interface for a single DSP and a CSP1027 ...
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... CSP1027’s SMODE0 connections and the DSP’s tdms register contents. A CSP1027 is assigned to time slot 2 if SMODE0 is low or to time slot 5 if SMODE0 is high. This allows up to two CSP1027s to be placed on a multiprocessor bus. The DSP input/output format can be configured to either most significant bit (MSB) first or least significant bit (LSB) first. The CSP1027 only supports MSB first format ...
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... DSP's transmit address to match the codec's control receive address. Note that since the CSP1027 sends all zeros for the protocol information, this will have to be used to identify the A/D data from the CSP1027. If two CSP1027s are ...
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... TIME 0 1 SLOT CK SYN DATA D[15:0] D[15:0] ADD A[15:0] A[15:0] Table 6. Hardwired CSP1027 Multiprocessor Time Slot and Addresses Transmit Time Slot Data, cdx(A/D), Transmit Address [7:0] Data, cdx(D/A), Receive Address [7:0] Control, cioc[0:3], Receive Address [7:0] CK SYN DATA D15 D14 ADD AD0 Figure 26. Multiprocessor Time-Slot Timing Lucent Technologies Inc. ...
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... Cellular Handset and Modem Applications 5 Register Information Tables 7 through 10 describe the programmable registers of the CSP1027 device. 5.1 Codec I/O Control 0 (cioc0) Register Table 7. Codec I/O Control 0 (cioc0) Register Bit 15—14 13 Field Reg TEST Field Value Reg 00 TEST 0* 1 ACTIVE 0* 1 OGSEL 1111 1110 1101 ...
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December 1999 5 Register Information (continued) 5.2 Codec I/O Control 1 (cioc1) Register Table 8. Codec I/O Control 1 (cioc1) Register Bit 15—14 Field Reg Field Value Reg 01 ADJMOD 0* 1 ADJ 000 0000* 000 0001 000 0010 . ...
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Cellular Handset and Modem Applications 5 Register Information (continued) 5.3 Codec I/O Control 2 (cioc2) Register Table 9. Codec I/O Control 2 (cioc2) Register Bit 15—14 Field Reg Field Value Reg 10 Reserved 0* CDIFS CDIF0 00 ...
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December 1999 5 Register Information (continued) 5.4 Codec I/O Control 3 (cioc3) Register Table 10. Codec I/O Control 3 (cioc3) Register Bit 15—14 Field Reg Field Value Reg 11 TSTPOR 0* 1 HPFE 0* 1 DITHER 0* 1 CDIF2 0 ...
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... The clock interface consists of the clock input, crystal oscillator, and clock outputs for the codec. 6.1.1 CLK Clock Input: The input clock for the CSP1027 when the XOSCEN is a logic low. Codec operation restricts CLK to integer frequencies from 1 MHz to 40 MHz or specific multiples of 8 kHz. When XOSCEN is tied to logic high, the CLK input is not selected but should be tied low or high to minimize input buffer power ...
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... SMODE 0 Serial Mode 0: Configures the CSP1027 serial I/O interface. When in active/passive mode (SMODE1 low), SYNC is an output when SMODE0 is high, and SYNC is an input when SMODE0 is low. In multiprocessor ...
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Cellular Handset and Modem Applications 6 Signal Descriptions (continued) 6.3.8 SADD Serial Address: When not in multiprocessor mode, SADD is an input that selects between the codec data registers, cdx(D/A) and cdx(A/D), and codec control registers, cioc[0:3]. SADD is inverted ...
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... When selecting component values, verify that the A/D frequency response will still meet the application requirements. 7.1.3 D/A Analog Output The CSP1027 D/A has two analog outputs, AOUTP and AOUTN, capable of operating as two single-ended drivers single fully differential driver. The output impedance of each is no more than 6 ured as fully differential) over the kHz frequency range ...
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... V regulator to ground, and Ra goes to the 5.0 V regulator. D2 Figure 28. Analog External Configurations in Preamplifier Mode (EIGS = 0) 34 (continued) V REG + REG – (0.1 F) – V SSA Vo Cin + (0.15 F) MICIN CSP1027 AUXIN + Vin2 – EIGS REFC V SSA C REF (0.22 F) ANALOG GND PLANE V SSA SSA 2 should be type X7R ceramic. ...
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December 1999 7 Application Information Ro AOUTP Vo Ro AOUTN Vo A. Fully Differential CL Ro AOUTP Vo Ro AOUTN Single-Ended, AOUTP CL Ro AOUTP AOUTN Vo E. Dual Single-Ended Lucent Technologies Inc. Cellular ...
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... Figure 28 on page 34 recommended that the analog and digital ground planes also meet at this point typical appli- cation where the CSP1027 is interfaced to a DSP advisable to place the DSP as close to the codec as possible, with the DSP's digital ground plane extending to the points where the SIO lines meet the CSP1027 ...
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... Fine-line CMOS (like that used to fabricate the CSP1027) generates hot electron currents when the logic gates change state. This current is injected into the substrate and adds to the supply current. The ...
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Cellular Handset and Modem Applications 7 Application Information 7.4 Crystal Oscillator If the option for using the external crystal is chosen, the following electrical characteristics and requirements apply. 7.4.1 External Components The crystal oscillator is enabled by connecting a crystal ...
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December 1999 7 Application Information 0 – EXT 50 pF –40 –60 –80 –100 –120 –140 –160 –180 –200 FREQUENCY (MHz) Figure 31. Negative Resistance of Crystal Oscillator Circuit – ...
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Cellular Handset and Modem Applications 7 Application Information Figure 33. Typical Supply Current of Crystal Oscillator Circuit, V Figure 34. Typical Supply Current of Crystal Oscillator Circuit (continued) 7.0 6.5 6.0 5.5 5 4.5 C 4.0 ...
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December 1999 7 Application Information 7.4.3 Printed-Circuit Board Layout Considerations The following guidelines should be followed when designing the printed-circuit board layout for a crystal-based application: 1. Keep crystal and external capacitors as close to XLO and XHI pins as ...
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Cellular Handset and Modem Applications 7 Application Information Arbitrarily set trap resonance to geometric mean the third overtone frequency desirable to have the net impedance of the trap circuit (X 3 impedance of ...
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... Figure 36 illustrates some of the sources of this variation. XTAL Notes External load capacitor (one each required for XLO and XHI). EXT C = Parasitic capacitance of the CSP1027 itself Parasitic capacitance of the printed-wiring board Parasitic capacitance of crystal (not part Figure 36 ...
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... Also, temperature and aging tolerance on the capacitors have been neglected. Typical capacitance variation of oscillator circuit in the CSP1027 itself across process, temperature, and supply voltage is ±1 pF. Thus, the expected frequency variation due to the CSP1027 is as follows: Approximate variation in parasitic capacitance of crystal = ±0.5 pF. ...
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... Application Information Thus, the contributions to frequency variation add up as follows: Initial Tolerance of Crystal Temperature Tolerance of Crystal Aging Tolerance of Crystal Load Capacitor Variation CSP1027 Circuit Variation C Variation 0 Board Variation Total This type of detailed analysis should be performed for any crystal-based application where frequency accu- racy is critical ...
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... Enhanced Oversampling Clock Generation If system constraints make the requirement of integer multiples of 125 x the sampling rate (typically integer multiples of 1.0 MHz) difficult to provide, the CSP1027 can also operate with the ICLK0 internal clock rate at integer multiples of the sampling rate (typically integer multiples of 8 kHz). See Section 4.5 on page 16 for more information ...
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... Values of 100 pF and 1500 are the most common and are the values used in the Lucent human-body model test circuit. The breakdown voltage for the CSP1027 is greater than 1000 V. 8.3 Recommended Operating Conditions Table 11. Recommended Operating Conditions ...
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Cellular Handset and Modem Applications 9 Electrical Characteristics and Requirements The following electrical characteristics are preliminary and are subject to change. Electrical characteristics refer to the behavior of the device under specified conditions. Electrical requirements refer to conditions imposed on ...
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December 1999 9 Electrical Characteristics and Requirements 5.0 4.8 4.6 4.4 4.2 4.0 3.8 3.6 3.4 0.0 0.5 1.0 1.5 Figure 37. Plot of V 0.50 0.45 0.40 0.35 0.30 0.25 0.20 0.15 0.10 0.05 0.00 0.0 0.5 1.0 1.5 ...
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Cellular Handset and Modem Applications 9 Electrical Characteristics and Requirements 9.1 Power Dissipation Power dissipation is highly dependent on the frequency of operation. The typical power dissipation listed is for a selected application. The following electrical characteristics are preliminary and ...
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December 1999 10 Analog Characteristics and Requirements The following analog characteristics and requirements are preliminary information and are subject to change. Ana- log characteristics refer to the behavior of the device under specified conditions. Analog requirements refer to con- ditions ...
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Cellular Handset and Modem Applications 10 Analog Characteristics and Requirements 10.2 Analog-to-Digital Path Table 16. A/D Signal to Distortion Plus Noise Ratio Output Signal Level Preamp (EIGS = 0) 0.5 Vp Range (cioc0: IRSEL = 0) Min 0 dBm0 71 ...
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December 1999 10 Analog Characteristics and Requirements 10.3 Digital-to-Analog Path Table 19. D/A Signal to Distortion Plus Noise Ratio (0 dB Output Setting) Output Signal Level 0 dBm0 –10 dBm0 –30 dBm0 –40 dBm0 –45 dBm0 –55 dBm0 Notes: The ...
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Cellular Handset and Modem Applications 10 Analog Characteristics and Requirements Table 22. D/A Frequency Response Relative to 1 kHz Output Level (f Frequency 100 Hz 200 Hz 300 Hz 3000 Hz 3400 Hz 4000 Hz 4600 ...
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December 1999 11 Timing Characteristics and Requirements The following timing characteristics and requirements are preliminary information and are subject to change. Tim- ing characteristics refer to the behavior of the device under specified conditions. Timing requirements refer to con- ditions ...
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Cellular Handset and Modem Applications 11 Timing Characteristics and Requirements 11.1 Clock Generation t3 V IH– * CLK V IL– V OH– † CKO1 V OL– V OH– ‡ CKO2 V OL– * OSCEN = 0 shown. † CDIV0 = ...
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... December 1999 11 Timing Characteristics and Requirements 11.2 Power-On Reset The CSP1027 has a power-on reset circuit that automatically clears the device upon power-on. If the supply voltage * falls below V MIN , the device must be reset. Figure 40 on page 57 shows two separate events: an initial power and a power-on following a drop in the power supply. ...
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Cellular Handset and Modem Applications 11 Timing Characteristics and Requirements 11.3 Reset V IH– CLK V IL– V IH– RSTB V IL– V OH– CKO1 V OL– V OH– CKO2 V OL– Note: CKO1 and CKO2 are active during reset ...
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December 1999 11 Timing Characteristics and Requirements 11.4 Serial I/O Communication V IH– IOCK V IL– t14 V IH– SYNC V IL– V IH– IL– V IH– SADD V IL– V OH– OL– Figure 42. Serial ...
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Cellular Handset and Modem Applications 11 Timing Characteristics and Requirements V OH– IOCK V OL– V OH– SYNC V OL– Figure 43. Serial I/O Active Mode Timing Diagram Table 31. Timing Characteristics for Active Mode Abbreviated Parameter Reference t23 Sync ...
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December 1999 11 Timing Characteristics and Requirements 11.5 Serial Multiprocessor Communication IOCK t27 t25 V IH– SYNC V IL– V OH– B0 DO/DI V OL– SADD Figure 44. SIO Multiprocessor Timing Diagram Table 32. Timing Requirements for Multiprocessor Communication Abbreviated ...
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Cellular Handset and Modem Applications 12 Outline Diagrams 12.1 44-Pin EIAJ Quad Flat Pack (QFP) Controlling dimensions are in millimeters. 13.20 ± 0.20 10.00 ± 0.20 PIN #1 IDENTIFIER ZONE DETAIL A 0.80 TYP Note: The ...
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December 1999 12 Outline Diagrams (continued) 12.2 48-Pin EIAJ Thin Quad Flat Pack (TQFP) Controlling dimensions are in millimeters. 9.00 ± 0.20 7.00 ± 0.20 PIN #1 IDENTIFIER ZONE DETAIL A DETAIL B 0.50 TYP Note: ...
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For additional information, contact your Microelectronics Group Account Manager or the following: INTERNET: http://www.lucent.com/micro E-MAIL: docmaster@micro.lucent.com N. AMERICA: Microelectronics Group, Lucent Technologies Inc., 555 Union Boulevard, Room 30L-15P-BA, Allentown, PA 18103 1-800-372-2447, FAX 610-712-4106 (In CANADA: 1-800-553-2448, FAX 610-712-4106) ASIA ...