AD722 Analog Devices, AD722 Datasheet

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AD722

Manufacturer Part Number
AD722
Description
RGB to NTSC/PAL Encoder
Manufacturer
Analog Devices
Datasheet

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a
PRODUCT DESCRIPTION
The AD722 is a low cost RGB to NTSC/PAL Encoder that
converts red, green and blue color component signals into their
corresponding luminance (baseband amplitude) and chromi-
nance (subcarrier amplitude and phase) signals in accordance
with either NTSC or PAL standards. These two outputs are
also combined to provide composite video output. All three out-
puts can simultaneously drive 75 , reverse-terminated cables.
All logical inputs are CMOS compatible. The chip operates
from a single +5 V supply. No external delay lines or filters are
required. The AD722 may be powered down when not in use.
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
NTSC/PAL
FEATURES
Low Cost, Integrated Solution
+5 V Operation
Accepts FSC Clock or Crystal, or 4FSC Clock
Composite Video and Separate Y/C (S-Video) Outputs
Minimal External Components:
Phase Lock to External Subcarrier
Drives 75
Logic Selectable NTSC or PAL Encoding Modes
Compact 16-Pin SOIC
APPLICATIONS
RGB to NTSC or PAL Encoding
CARRIER
HSYNC
VSYNC
No External Filters or Delay Lines Required
Onboard DC Restoration
Accepts Either HSYNC & VSYNC or CSYNC
SUB-
4FSC
FSC
GREEN
BLUE
RED
Reverse-Terminated Loads
4FSC
4FSC
XNOR
XNOR
CLAMP
CLAMP
CLAMP
DC
DC
DC
CSYNC
QUADRATURE
DECODER
SEPARATOR
+4
SYNC
XOSC
XOSC
RGB-TO-YUV
ENCODING
MATRIX
BURST
DETECTOR
PHASE
FSC
FSC 90
FSC 0
Y
U
V
BURST
CHARGE
CHARGE
LP PRE-
3-POLE
4-POLE
4-POLE
FILTER
PUMP
PUMP
LPF
LPF
FUNCTIONAL BLOCK DIAGRAM
(PAL ONLY)
NTSC/PAL
CLAMP
CLAMP
180
FILTER
FILTER
U
V
LOOP
LOOP
CSYNC
SC 90 /270
The AD722 accepts either FSC or 4FSC clock. When a clock is
not available, a low cost parallel-resonant crystal (3.58 MHz
(NTSC) or 4.43 MHz (PAL)) and the AD722’s on-chip oscilla-
tor generate the necessary subcarrier clock. The AD722 also ac-
cepts the subcarrier clock from an external video source.
The interface to VGA Controllers and MPEG Video Decoders
is simple: an on-chip logic “XNOR” accepts the available verti-
cal (VSYNC) and horizontal sync (HSYNC) signals and creates
the composite sync (CSYNC) signal on-chip. If available, the
AD722 will also accept a standard CSYNC signal by connecting
VSYNC to +5 V and applying CSYNC to HSYNC pin. The
AD722 contains decoding logic to identify valid HSYNC pulses
for correct burst insertion.
Delays in the U and V chroma filters are matched by an on-chip
sampled-data delay line in the Y signal path. To prevent
aliasing, a prefilter at 5 MHz is included ahead of the delay line
and a post-filter at 5 MHz is added after the delay line to sup-
press harmonics in the output. These low-pass filters are opti-
mized for minimum pulse overshoot. The overall luma delay,
relative to chroma, has been designed to be 170 ns, which
precompensates for delays in the filters used in the IF section of
a television receiver. This precompensation delay is already
present in TV broadcasts. The AD722 comes in a space-saving
SOIC and is specified for the 0 C to +70 C commercial tem-
perature range.
One Technology Way, P.O. Box 9106, Norwood. MA 02062-9106, U.S.A.
Tel: 617/329-4700
4FSC
4FSC
VCO
VCO
MODULATORS
INSERTION
BALANCED
CSYNC
RGB to NTSC/PAL Encoder
NTSC/PAL
SAMPLED-
DELAY
DATA
LINE
AT 4FSC
CLOCK
3.6MHz (NTSC)
4.4MHz (PAL)
3-POLE LPF
NTSC/PAL
LP POST-
2-POLE
FILTER
© Analog Devices, Inc., 1995
X2
X2
X2
AD722
Fax: 617/326-8703
COMPOSITE
OUTPUT
LUMINANCE
OUTPUT
CHROMINANCE
OUTPUT

Related parts for AD722

AD722 Summary of contents

Page 1

... No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. The AD722 accepts either FSC or 4FSC clock. When a clock is not available, a low cost parallel-resonant crystal (3.58 MHz (NTSC) or 4.43 MHz (PAL)) and the AD722’s on-chip oscilla- tor generate the necessary subcarrier clock ...

Page 2

... AD722–SPECIFICATIONS Parameter SIGNAL INPUTS (RDIN, GRIN, BLIN) Input Amplitude Black Level 1 Input Resistance Input Capacitance LOGIC INPUTS (SYNC, FSC, ENCD, NTSC) Logic LO Input Voltage Logic HI Input Voltage Logic LO Input Current (DC) Logic HI Input Current (DC) 2 VIDEO OUTPUTS Luminance (LUMA) Roll-off @ 5 MHz ...

Page 3

... ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD722 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality ...

Page 4

... AD722 Pin Mnemonic 1 STND 2 AGND 3 FIN 4 APOS 5 ENCD 6 RIN 7 GIN 8 BIN 9 CRMA 10 COMP 11 LUMA 12 SELECT 13 DGND 14 DPOS 15 VSYNC 16 HSYNC *The Luminance, Chrominance, and Composite Outputs are at twice normal levels for driving 75 DPOS Circuit A APOS 3 PIN DESCRIPTIONS Description A Logical HIGH input selects NTSC encoding. ...

Page 5

... SLOW CLAMP TO 0.00V @ 6.72µs 0.5 0.0 PRECISION MODE OFF SOUND-IN-SYNC OFF SYNCHRONOUS SYNC = SOURCE FRAMES SELECTED : –0 µs Figure 3. Modulated Pulse and Bar, PAL REV. 0 Typical Characteristics–AD722 0.10 COMPOSITE SONY VIDEO MONITOR MODEL 1342 0.5 75 0.0 TEKTRONIX VM700A WAVEFORM MONITOR –0.5 0 ...

Page 6

... AD722–Typical Characteristics Figure 7. 100% Color Bars on Vector Scope, PAL 0.10 APL = 11.6% 525 LINE NTSC NO FILTERING SLOW CLAMP TO 0.00V @ 6.63µs 0.5 0.0 PRECISION MODE OFF SYNCHRONOUS SYNC = SOURCE FRAMES SELECTED : 1 2 –0 µs Figure 8. Multipulse, NTSC 0.10 APL = 11.4% 625 LINE PAL NO FILTERING SLOW CLAMP TO 0.00V @ 6.72µs ...

Page 7

... BLUE DC CLAMP THEORY OF OPERATION The AD722 was designed to have three allowable modes of ap- plying a clock via the FIN pin. These are FSC (frequency of subcarrier, 3.579545 MHz for NTSC or 4.433618 MHz for PAL) mode with CMOS clock applied, FSC mode using on- chip crystal oscillator, and 4FSC mode with CMOS clock ap- plied ...

Page 8

... The CSYNC signal (after the XNOR gate) also goes to the digi- tal section of the AD722 where it is clocked 2FSC clock. The digital section then measures the width of the CSYNC pulses to separate horizontal pulses from vertical equalizing and serration pulses ...

Page 9

... VGA OUTPUT CONNECTOR Figure 15. Interfacing the AD722 to the (Interlaced) VGA Port REV. 0 resistor is required close to each AD722 output, while 75 ground should terminate the far end of each line. The outputs have a dc bias and must be ac coupled for proper operation ...

Page 10

... For a synchronous NTSC system, the internal 4FSC (14.31818 MHz) clock that drives the VGA controller can be used for FIN on the AD722. This signal is not directly accessible from outside the computer, but it does appear on the VGA card separate RGB monitor is also to be used not possible to simply connect it to the R, G, and B signals ...

Page 11

... This correction to TV broadcasts was made in the early days of TV and is the standard to this day. The delay line used in the luminance path of the AD722 creates a –170 ns chrominance delay. This will be realigned by the RF section when it is used for receiving the signal. ...

Page 12

... AD722 Synchronous vs. Asynchronous Operation The source of RGB video and synchronization used as an input to the AD722 in some systems is derived from the same clock signal as used for the AD722 subcarrier input (FIN). These systems are said to be operating synchronously. In systems where two different clock sources are used for these signals, the operation is called asynchronous ...

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