TC55V8512FT-15 TOSHIBA Semiconductor CORPORATION, TC55V8512FT-15 Datasheet

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TC55V8512FT-15

Manufacturer Part Number
TC55V8512FT-15
Description
TC55V8512FT-15TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet

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524,288-WORD BY 8-BIT CMOS STATIC RAM
DESCRIPTION
words by 8 bits. Fabricated using CMOS technology and advanced circuit techniques to provide high speed, it
operates from a single 3.3 V power supply. Chip enable ( CE ) can be used to place the device in a low-power mode,
and output enable ( OE ) provides fast memory access. This device is well suited to cache memory applications
where high-speed access and high-speed storage are required. All inputs and outputs are directly LVTTL
compatible. The TC55V8512J/FT is available in plastic 36-pin SOJ and 44-pin TSOP with 400mil width for high
density surface assembly.
FEATURES
PIN ASSIGNMENT
GND
I/O1
I/O2
I/O3
I/O4
A17
A16
A15
A14
A13
A18
WE
V
The TC55V8512J/FT is a 4,194,304-bit high-speed static random access memory (SRAM) organized as 524,288
CE
A3
A2
A1
A0
DD
Fast access time (the following are maximum values)
Low-power dissipation
(the following are maximum values)
36 PIN SOJ
Operation (max)
(TC55V8512J)
TC55V8512J/FT-12:12 ns
TC55V8512J/FT-15:15 ns
Standby:4 mA (both devices)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
Cycle Time
TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
170
12
NC
A4
A5
A6
A7
OE
I/O8
I/O7
GND
V
I/O6
I/O5
A8
A9
A10
A11
A12
NU
DD
(TOP VIEW)
140
15
GND
I/O1
I/O2
I/O3
I/O4
A17
A16
A15
A14
A13
A18
WE
V
NC
NC
CE
NC
NC
44 PIN TSOP
A3
A2
A1
A0
DD
130
20
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
110
25
(TC55V8512FT)
mA
ns
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
NC
NC
NC
A4
A5
A6
A7
OE
I/O8
I/O7
GND
V
I/O6
I/O5
A8
A9
A10
A11
A12
NU
NC
NC
DD
Single power supply voltage of 3.3 V ± 0.3 V
Fully static operation
All inputs and outputs are LVTTL compatible
Output buffer control using OE
Package:
SOJ36-P-400-1.27 (J)
TSOP II44-P-400-0.80 (FT)
PIN NAMES
I/O1 to I/O8
A0 to A18
GND
V
WE
CE
OE
NC
NU
DD
TC55V8512J/FT-12,-15
Address Inputs
Data Inputs/Outputs
Chip Enable Input
Write Enable Input
Output Enable Input
Power (+3.3 V)
Ground
No Connection
Not Usable (Input)
2001-12-19 1/10
(Weight: 1.35 g typ)
(Weight: 0.45 g typ)

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TC55V8512FT-15 Summary of contents

Page 1

... A10 18 27 A11 19 26 A12 (TC55V8512FT) TC55V8512J/FT-12,-15 (Weight: 1.35 g typ) (Weight: 0.45 g typ A18 Address Inputs I/O1 to I/O8 Data Inputs/Outputs CE Chip Enable Input WE Write Enable Input OE Output Enable Input V Power (+3 GND Ground NC No Connection NU Not Usable (Input) ...

Page 2

BLOCK DIAGRAM A12 A14 A15 A16 A17 I/O1 I/O2 I/O3 I/O4 I/O5 I/O5 I/O7 I/O8 GENERATOR MAXIMUM RATINGS SYMBOL V Power Supply Voltage DD V Input Terminal Voltage IN V Input/Output Terminal ...

Page 3

V DC CHARACTERISTICS SYMBOL PARAMETER Input Leakage Current I IL (Except NU pin) Output Leakage I LO Current Input Current I I (NU) (NU pin) V Output High Voltage OH V Output ...

Page 4

AC CHARACTERISTICS READ CYCLE SYMBOL PARAMETER t Read Cycle Time RC t Address Access Time ACC t Chip Enable Access Time CO t Output Enable Access Time OE t Output Data Hold ...

Page 5

TIMING DIAGRAMS (See Note 2) READ CYCLE Address Hi-Z OUT WE WRITE CYCLE 1 ( CONTROLLED) Address OUT ACC (See Note 6) t OEE (See ...

Page 6

WRITE CYCLE CONTROLLED) Address Hi-Z OUT D IN (See Note (See Note 6) t ODW (See Note 6) t COE INDETERMINATE t DS ...

Page 7

Note: (1) Operating temperature (Ta) is guaranteed for transverse air flow exceeding 400 linear feet per minute. (2) WE remains HIGH for the Read Cycle. ( goes LOW coincident with or after WE goes LOW, the outputs will ...

Page 8

PACKAGE DIMENSIONS Weight: 1.35 g (typ) TC55V8512J/FT-12,-15 2001-12-19 8/10 ...

Page 9

PACKAGE DIMENSIONS Weight: 0.45 g (typ) TC55V8512J/FT-12,-15 2001-12-19 9/10 ...

Page 10

RESTRICTIONS ON PRODUCT USE • TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress ...

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