AD811ANZ Analog Devices Inc, AD811ANZ Datasheet - Page 16

• Manufacturer Part Number: AD811ANZ
• Description: IC OPAMP VIDEO HP 8-DIP
• Manufacturer: Analog Devices Inc

Specifications of AD811ANZ

• Slew Rate: 2500 V/µs
• Applications: Current Feedback
• Number Of Circuits: 1
• -3db Bandwidth: 140MHz
• Current - Supply: 16.5mA
• Current - Output / Channel: 100mA
• Voltage - Supply, Single/dual (±): ±4.5 V ~ 18 V
• Mounting Type: Through Hole
• Package / Case: 8-DIP (0.300", 7.62mm)
• Gain Bandwidth: 140MHz
• Supply Voltage Range: ± 4.5V To ± 18V
• No. Of Amplifiers: 1
• Output Current: 100mA
• Amplifier Output: Single Ended
• Amplifier Type: Video
• Bandwidth: 140 MHz
• Common Mode Rejection Ratio: 60
• Current, Input Bias: 2 μA
• Current, Output: 100 mA
• Harmonic Distortion: -74 dBc
• Impedance, Thermal: 90 °C/W
• Package Type: PDIP-8
• Resistance, Input: 1.5 Megohms (+Input), 14 Ohms (-Input)
• Temperature, Operating, Range: -40 to +85 °C
• Voltage, Input: ±3 V (Common-Mode)
• Voltage, Noise: 1.9 nV/sqrt Hz
• Voltage, Offset: 0.5 mV
• Voltage, Output, High: +12 V
• Voltage, Output, Low: -12 V
• Voltage, Supply: ±15 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

AD811
A VIDEO KEYER CIRCUIT
By using two AD834 multipliers, an AD811, and a 1 V dc source,
a special form of a two-input VCA circuit called a video keyer
can be assembled. Keying is the term used in reference to blend-
ing two or more video sources under the control of a third
signal or signals to create such special effects as dissolves and
overlays. The circuit shown in Figure 48 is a two-input keyer,
with video inputs V
transfer function (with V
where G is a dimensionless variable (actually, just the gain of the
A signal path) that ranges from 0 when V
1 V. Thus, V
varies from 0 to 1.
Circuit operation is straightforward. Consider first the signal
path through U1, which handles video input V
clearly 0 when V
a unity value when V
the transfer function. On the other hand, the V
taken to the inverting input X2 while X1 is biased at an accurate
V
OUT
= GV
(0 TO +1V dc)
V
V
G
A
OUT
A
(±1V FS)
+ (1−G)V
varies continuously between V
V
G
B
113Ω
(±1V FS)
R5
= 0, and the scaling chosen ensures that it has
A
G
and V
= 1 V; this takes care of the first term of
B
1.87kΩ
1.02kΩ
OUT
174Ω
100Ω
B
R1
R2
R3
R4
, and a control input V
at the load) is given by
+5V
AD589
U4
226Ω
R6
G
= 0 to 1 when V
X2
Y1
X2
Y1
8
1
8
1
A
A
G
and V
. Its gain is
input to U2 is
Y2
Y2
7
X1 +V
2
7
X1 +V
2
AD834
AD834
G
U1
U1
. The
Figure 48. A Practical Video Keyer Circuit
+5V
–5V
–5V
–V
–V
B
6
3
6
3
S
S
as G
S
S
R7
45.3Ω
W1
W2
W1
W2
5
4
5
4
G
=
Rev. E | Page 16 of 20
1 V. Thus, when V
at its full-scale value of unity, whereas when V
ential input X1−X2 is 0. This generates the second term.
The bias currents required at the output of the multipliers are
provided by R8 and R9. A dc level-shifting network comprising
R10/R12 and R11/R13 ensures that the input nodes of the
AD811 are positioned at a voltage within its common-mode
range. At high frequencies, C1 and C2 bypass R10 and R11,
respectively. R14 is included to lower the HF loop gain and is
needed because the voltage-to-current conversion in the
AD834s, via the Y2 inputs, results in an effective value of the
feedback resistance of 250 Ω; this is only about half the value
required for optimum flatness in the AD811’s response. (Note
that this resistance is unaffected by G: when G = +1, all the
feedback is via U1, while when G = 0 it is all via U2). R14
reduces the fractional amount of output current from the
multipliers into the current-summing inverting input of the
AD811 by sharing it with R8. This resistor can be used to adjust
the bandwidth and damping factor to best suit the application.
0.1µF
C1
R8
29.4Ω
R9
29.4Ω
2.49kΩ
2.49kΩ
+5V
0.1µF
R11
R10
C2
SEE TEXT
R14
R12
6.98kΩ
R13
6.98kΩ
–5V
G
= 0, the response to video input V
2
3
–
+
TO PIN 6
SETUP FOR DRIVING
REVERSE-TERMINATED LOAD
AD811
TO Y2
AD811
FB
FB
U3
–5V
+5V
7
4
0.1µF
0.1µF
C3
C4
200Ω
200Ω
Z
O
LOAD
6
GND
LOAD
GND
G
V
OUT
= 1 V, the differ-
Z
INSET
O
V
OUT
B
is already