CY37064P44-167AI Cypress Semiconductor Corporation., CY37064P44-167AI Datasheet
CY37064P44-167AI
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CY37064P44-167AI Summary of contents
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Features • 64 macrocells in four logic blocks • In-System Reprogrammable™ (ISR™) — JTAG-compliant on-board programming — Design changes don’t cause pinout changes — Design changes don’t cause timing changes • I/Os — plus 5 dedicated inputs ...
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Functional Description The CY37064 is an In-System Reprogrammable (ISR) Com- plex Programmable Logic Device (CPLD) and is part of the Ultra37000™ family of high-density, high-speed CPLDs. Like all members of the Ultra37000 family, the CY37064 is de- signed to bring ...
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Pin Configurations I/O /TCLK 5 I/O I/O CLK 2 JTAG GND CLK 0 I/O I/O I/O I/O I/O /TCLK 5 I/O I/O CLK JTAG GND CLK I/O I/O I/O I/O PRELIMINARY 44-pin TQFP Top View ...
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Pin Configurations (continued I I /TCLK I CLK / VCCO 21 GND 22 CLK ...
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Pin Configurations (continued) 100 TCLK 1 GND CLK / ...
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Maximum Ratings (Above which the useful life may be impaired. For user guide- lines, not tested.) Storage Temperature ................................. – +150 C Ambient Temperature with Power Applied ............................................. – +125 C Supply Voltage to Ground Potential ...
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Electrical Characteristics Over the Operating Range Parameter Description V Output HIGH Voltage OH V Output HIGH Voltage with Out- OHZ [7] put Disabled V Output LOW Voltage OL V Input HIGH Voltage IH V Input LOW Voltage IL I Input ...
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AC Test Loads and Waveforms 238 (COM'L) 319 (MIL) 5V OUTPUT 170 (COM' 236 (MIL) INCLUDING JIG AND SCOPE (a) 37064-6 Equivalent to: THÉVENIN EQUIVALENT 99 (COM'L) 136 (MIL) 2.08V (COM'L) OUTPUT 2.13V (MIL ...
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Switching Characteristics Over the Operating Range Parameter Description Combinatorial Mode Parameters [10, 11, 12] t Input to Combinatorial Output PD [10, 11, 12] t Input to Output Through Transparent Input or PDL Output Latch [10, 11, 12] t Input to ...
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Switching Characteristics Over the Operating Range Parameter Description t Buried Register Used as an Input Register or Latch IHPT Data Hold Time [10, 11, 12] t Product Term Clock or Latch Enable (PTCLK) to CO2PT Output Delay (Through Logic Array) ...
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Typical I Characteristics The typical pattern is a 16-bit up counter, per logic block, with outputs disabled. PRELIMINARY ...
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Switching Waveforms Combinatorial Output INPUT COMBINATORIAL OUTPUT Registered Output with Synchronous Clocking INPUT SYNCHRONOUS CLOCK REGISTERED OUTPUT REGISTERED OUTPUT SYNCHRONOUS CLOCK Registered Output with Product Term Clocking Input Going Through the Array INPUT PRODUCT TERM CLOCK REGISTERED OUTPUT PRODUCT TERM ...
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Switching Waveforms (continued) Registered Output with Product Term Clocking Input Coming From Adjacent Buried Register INPUT PRODUCT TERM CLOCK REGISTERED OUTPUT PRODUCT TERM CLOCK Latched Output INPUT LATCH ENABLE LATCHED OUTPUT Registered Input REGISTERED INPUT INPUT REGISTER CLOCK COMBINATORIAL OUTPUT ...
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Switching Waveforms (continued) Clock to Clock INPUT REGISTER CLOCK OUTPUT REGISTER CLOCK Latched Input LATCHED INPUT LATCH ENABLE COMBINATORIAL OUTPUT LATCH ENABLE Latched Input and Output LATCHED INPUT LATCHED OUTPUT INPUT LATCH ENABLE OUTPUT LATCH ENABLE LATCH ENABLE PRELIMINARY t ...
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Switching Waveforms (continued) Asynchronous Reset INPUT REGISTERED OUTPUT CLOCK Asynchronous Preset INPUT REGISTERED OUTPUT CLOCK Output Enable/Disable INPUT OUTPUTS PRELIMINARY CY37064 t RR 37064- 37064- ...
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... Speed (MHz) Ordering Code 200 CY37064P100-200AC CY37064P84-200JC CY37064P44-200AC CY37064P44-200JC 167 CY37064P100-167AC CY37064P84-167JC CY37064P44-167AC CY37064P44-167JC CY37064P100-167AI CY37064P84-167JI CY37064P44-167AI CY37064P44-167JI CY37064P44-167YMB 125 CY37064P100-125AC CY37064P84-125JC CY37064P44-125AC CY37064P44-125JC CY37064P100-125AI CY37064P84-125JI CY37064P44-125AI CY37064P44-125JI CY37064P44-125YMB In-System Reprogrammable, ISR, UltraLogic, F Cypress Semiconductor Corporation. Warp2 and Warp3 are registered trademarks of Cypress Semiconductor Corporation. ...
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Package Diagrams PRELIMINARY 44-Lead Thin Plastic Quad Flat Pack A44 17 CY37064 51-85064-B ...
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Package Diagrams (continued) 100-Pin Thin Plastic Quad Flat Pack (TQFP) A100 PRELIMINARY 44-Lead Plastic Leaded Chip Carrier J67 18 CY37064 51-85048-A 51-85003-A ...
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Package Diagrams (continued) PRELIMINARY 84-Lead Plastic Leaded Chip Carrier J83 19 CY37064 51-85006-A ...
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Package Diagrams (continued) © Cypress Semiconductor Corporation, 1999. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor ...