AD817AR Analog Devices Inc, AD817AR Datasheet - Page 10

• Manufacturer Part Number: AD817AR
• Description: IC OPAMP HS LP 8-SOIC
• Manufacturer: Analog Devices Inc

Specifications of AD817AR

• Slew Rate: 350 V/µs
• Mounting Type: Surface Mount
• Rohs Status: RoHS non-compliant
• Applications: General Purpose
• Number Of Circuits: 1
• -3db Bandwidth: 50MHz
• Current - Supply: 7mA
• Current - Output / Channel: 50mA
• Voltage - Supply, Single/dual (±): 5 V ~ 36 V, ±2.5 V ~ 18 V
• Package / Case: 8-SOIC (0.154", 3.90mm Width)
• No. Of Amplifiers: 1
• Bandwidth: 50MHz
• No. Of Pins: 8
• Settling Time: 70ns
• Operating Temperature Max: 85°C
• Peak Reflow Compatible (260 C): No
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

AD817
OFFSET NULLING
The input offset voltage of the AD817 is inherently very low.
However, if additional nulling is required, the circuit shown in
Figure 32 can be used. The null range of the AD817 in this con-
figuration is 15 mV.
AD817 SETTLING TIME
Settling time is comprised primarily of two regions. The first is
the slew time in which the amplifier is overdriven, where the
output voltage rate of change is at its maximum. The second is
the linear time period required for the amplifier to settle to
within a specified percent of the final value.
0.05
0.05
0.10
0.15
0.20
Figure 33. Settling Time in ns 0 V to +10 V
0
GENERATOR
TTL LEVEL
DIGITAL
GROUND
ANALOG
GROUND
OUTPUT
SIGNAL
0
50Hz
50
0 TO 10V
SUPPLY
POWER
100
150
13
2
1, 14
7, 8
200
OUTPUT
SIGNAL
ERROR
EI&S
DL1A05GM
MERCURY RELAY
250
CABLE
COAX
50
300
100
350
Figure 35. Settling Time Test Circuit
ERROR AMPLIFIER
V
ERROR
50
2
HP2835
400
1k
500
2.2 F
OUTPUT
ADJUST
10
8
6
4
2
0
NULL
0.01 F
10
0.47 F
100
0.01 F
2
3
3
2
–10–
FALSE
SUMMING
NODE
AD817
AD829
–V
1.9k
500
–V
4
Measuring the rapid settling time of AD817 (45 ns to 0.1% and
70 ns to 0.01%–10 V step) requires applying an input pulse with
a very fast edge and an extremely flat top. With the AD817 con-
figured in a gain of –1, a clamped false summing junction re-
sponds when the output error is within the sum of two diode
voltages (ª1 volt). The signal is then amplified 20 times by a
clamped amplifier whose output is connected directly to a sam-
pling oscilloscope. Figures 33 and 34 show the settling time of
the AD817, with a 10 volt step applied.
S
7
S
+V
5–18pF
5
7
S
+V
4
2.2 F
S
1k
0.20
0.15
0.10
0.05
0.05
2
HP2835
6
6
0.01 F
0
Figure 34. Settling Time in ns 0 V to –10 V
0.47 F
0.01 F
DEVICE
UNDER
TEST
0
NOTE:
USE CIRCUIT BOARD
WITH GROUND PLANE
50
100
SHORT, DIRECT
CONNECTION TO
TEKTRONIX TYPE 11402
OSCILLOSCOPE PREAMP
INPUT SECTION
100
10pF
SCOPE PROBE
CAPACITANCE
1M
150
SETTLING
OUTPUT
200
15pF
250
TEKTRONIX P6201
FET PROBE TO
TEKTRONIX TYPE
11402
OSCILLOSCOPE
PREAMP INPUT
SECTION
300
350
400
REV. B
0
–2
–4
–6
–8
–10