ILX538K ETC, ILX538K Datasheet

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ILX538K

Manufacturer Part Number
ILX538K
Description
Manufacturer
ETC
Datasheet
V
Along with the current rapid growth in the personal computer
market, the color image scanner is poised for rapid growth.
Although Sony has already developed a line of products for
color image scanners, we have now developed a new product
to support A4-size documents at a deusity of 600 DPI : the
ILX538K 2-line color linear sensor with a 1-line spacing.
Figure 1 shows the block diagram for a
3-line sensor and figure 2 shows the
block diagram of the ILX538K sensor
block. In 3-line sensors, the pixel lines
are usually separated by a spacing of
several pixel widths. Application
systems normally compensate for this
by providing external memory and
performing interline interpolation as
synchronization processing. The
ILX538K consists of 2 lines, a dot-
sequential R and B line and a G line and
succeeds in reducing the interline spac-
ing to just 1 line.
2-Line Color CCD Linear Sensor
with a 1-Line Spacing
ILX538K
Of the 600 DPI color linear sensors
developed to date, the ILX538K
best provides the three critical
sensor aspects; namely a small
pixel size, ease of use, and a nar-
row line spacing. I’m sure that this
device will be well received in the
color image scanner market as the
indispensable key device for driv-
ing further expansion of that mar-
ket. Once you have been intro-
duced to this product, you will find
it truly indispensable.
2-Line Color Linear Sensor
Consisting of an R and B
Dot-sequential Line and a
G Line
O
I
C
E
The ILX538K includes one line of
analog memory for each of the R/B and
G sensor lines and the CCD registers. It
is possible to perform line data
synchronization for the 2-sensor lines
using this memory. This makes
external correction (line data synchro-
nization) memory unnecessary, and can
significantly simplify the peripheral
circuits. Since this analog memory is
provided for both the R/B and G lines,
line data synchronization can be per-
formed for scanning in either direction,
thus provide a high degree of freedom
in end product design.
Figure 3 shows the block diagram of the
ILX538K. One of the sensor lines is an
R/B dot-sequential lines and the other
is the G line. This structure allows the
ILX538K to achieve a minimum line
spacing of 1 line (7 m), which is equal
to the pixel spacing. Table 1 presents
an overview of the characteristics of the
ILX538K. The effective pixel size is
5 6 m (for a 7 m pitch), and the
ILX538K achieves the high pixel counts
of 2670 effective pixels for the R and B
lines and 5340 for the G line.
to a 7- m Pitch
Analog Memory for Line
Synchronization Provided
in the CCD Block
Pixel Size Corresponding
2-line color linear sensor consisting of an
R and B dot-sequential line and a G line
Pixel line spacing of 1 line
Analog memory included in the CCD
block.
Pixel size corresponding to a 7- m pitch
Ultra-low lag
Excellent linearity
Built-in clamp circuit
Built-in sample-and-hold circuit
Table 2 lists the electro-optical charac-
teristics of the ILX538K. Since the
sensor block signal charges are fully
read out, there is no lag. Also, the
ILX538K provides excellent linearity
from small signals through the satura-
tion output voltage.
The ILX538K includes both clamp and
sample-and-hold circuits for all signal
outputs. Also, the ILX538K provides
two independent parallel sample-and-
hold circuits for the R/B dot-sequential
output circuits, so that the R and B sig-
nals can be output separately to
individual output pins.
Excellent Linearity
Built-in Clamp and
Sample-and-Hold Circuits

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ILX538K Summary of contents

Page 1

... Although Sony has already developed a line of products for color image scanners, we have now developed a new product to support A4-size documents at a deusity of 600 DPI : the ILX538K 2-line color linear sensor with a 1-line spacing. 2-Line Color Linear Sensor Consisting and B Dot-sequential Line and a ...

Page 2

... CCD analog shift register Figure 1 Block Diagram of the Sensor Block in a 3-Line Sensor CCD analog shift register 1-line delay analog memory Readout gates - - - Readout gates 1-line delay analog memory CCD analog shift register Figure 2 Block Diagram of ILX538K Sensor Block bias circuit ...

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