VT82C686B

Manufacturer Part NumberVT82C686B
ManufacturerETC-unknow
VT82C686B datasheet
 
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Page 19/128:

Signal Description

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7HFKQRORJLHV ,QF
UltraDMA-33 / 66 / 100 Enhanced IDE Interface (continued)
Signal Name
Pin #
PDCS1#
L20
PDCS3#
M16
U17
SDCS1#
U18
SDCS3#
PDA[2-0]
M18, M19, M17
SDA[2-0]
U20, V18, U19
PDD[15-0]
N20, P17, P19, R16,
R18, R20, T17, T19,
T20, T18, T16, R19,
R17, P20, P18, P16
SDD[15-0] / SA[15-0]
P5, R1-R5, T1-T4,
U1-U3, V1, V2, W1
IDEIRQA / DACK0#
L2
IDEIRQB / DACK1#
E1
Revision 1.71 June 9, 2000
I/O

Signal Description

O
Primary Master Chip Select. This signal corresponds to CS1FX# on
the primary IDE connector.
O
Primary Slave Chip Select. This signal corresponds to CS3FX# on the
primary IDE connector.
O
Secondary Master Chip Select. This signal corresponds to CS17X# on
the secondary IDE connector.
O
Secondary Slave Chip Select. This signal corresponds to CS37X# on
the secondary IDE connector.
O
Primary Disk Address. PDA[2:0] are used to indicate which byte in
either the ATA command block or control block is being accessed.
O
Secondary Disk Address. SDA[2:0] are used to indicate which byte in
either the ATA command block or control block is being accessed.
IO
Primary Disk Data
IO
Secondary Disk Data muxed with ISA Bus Address.
O
IDE Interrupt Request A. Output of internal block.
O
IDE Interrupt Request B. Output of internal block.
-13-
VT82C686B
Pinouts