MC68HC11A0P Freescale Semiconductor, Inc, MC68HC11A0P Datasheet

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MC68HC11A0P

Manufacturer Part Number
MC68HC11A0P
Description
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Technical Summary
8-Bit Microcontrollers
1 Introduction
1.1 Features
© MOTOROLA INC., 1991, 1996
MOTOROLA
SEMICONDUCTOR
TECHNICAL DATA
This document contains information on a new product. Specifications and information herein are subject to change without notice.
The MC68HC11A8, MC68HC11A1, and MC68HC11A0 high-performance microcontroller units (MCUs)
are based on the M68HC11 Family. These high speed, low power consumption chips have multiplexed
buses and a fully static design. The chips can operate at frequencies from 3 MHz to dc. The three MCUs
are created from the same masks; the only differences are the value stored in the CONFIG register, and
whether or not the ROM or EEPROM is tested and guaranteed.
For detailed information about specific characteristics of these MCUs, refer to the M68HC11 Reference
Manual (M68HC11RM/AD).
• M68HC11 CPU
• Power Saving STOP and WAIT Modes
• 8 Kbytes ROM
• 512 Bytes of On-Chip EEPROM
• 256 Bytes of On-Chip RAM (All Saved During Standby)
• 16-Bit Timer System
• 8-Bit Pulse Accumulator
• Real-Time Interrupt Circuit
• Computer Operating Properly (COP) Watchdog System
• Synchronous Serial Peripheral Interface (SPI)
• Asynchronous Nonreturn to Zero (NRZ) Serial Communications Interface (SCI)
• 8-Channel, 8-Bit Analog-to-Digital (A/D) Converter
• 38 General-Purpose Input/Output (I/O) Pins
• Available in 48-Pin Dual In-Line Package (DIP) or 52-Pin Plastic Leaded Chip Carrier (PLCC)
— 3 Input Capture Channels
— 5 Output Compare Channels
— 15 Bidirectional I/O Pins
— 11 Input-Only Pins and 12 Output-Only Pins (Eight Output-Only Pins in 48-Pin Package)
MC68HC11A8
MC68HC11A1
MC68HC11A0
by MC68HC11A8TS/D
Order this document

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MC68HC11A0P Summary of contents

Page 1

MOTOROLA SEMICONDUCTOR TECHNICAL DATA Technical Summary 8-Bit Microcontrollers 1 Introduction The MC68HC11A8, MC68HC11A1, and MC68HC11A0 high-performance microcontroller units (MCUs) are based on the M68HC11 Family. These high speed, low power consumption chips have multiplexed buses and a fully static design. ...

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... No ROM, No EEPROM Comments Family built around this device ROM disabled ROM and EEPROM disabled MC Order Number MC68HC11A8P1 No ROM MC68HC11A1P No ROM MC68HC11A1VP No ROM MC68HC11A1MP MC68HCP11A1P MC68HCP11A1VP MC68HCP11A1MP MC68HC11A0P MC68HC11A8FN1 No ROM MC68HC11A1FN No ROM MC68HC11A1VFN No ROM MC68HC11A1MFN MC68HCP11A1FN MC68HCP11A1VFN MC68HCP11A1MFN MC68HC11A0FN MC68HC11A8 MC68HC11A8TS/D ...

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Section 1 Introduction............................................................................................................................................... 1 1.1 Features .......................................................................................................................................... 1 2 Operating Modes and Memory Maps ....................................................................................................... 6 2.1 Memory Maps .................................................................................................................................. 7 3 Resets and Interrupts ............................................................................................................................. 13 4 Electrically Erasable Programmable Read-Only Memory (EEPROM) ................................................... 17 5 Parallel Input/Output............................................................................................................................... 19 ...

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XTAL EXTAL E PULSE PA7 PAI/OC1 ACCUMULATOR PA6 OC2/OC1 PA5 OC3/OC1 PA4 OC4/OC1 PA3 OC5/OC1 PA2 IC1 PA1 IC2 PA0 IC3 SINGLE EXPANDED CHIP A15 PB7 A14 PB6 A13 PB5 A12 PB4 A11 PB3 A10 PB2 A9 PB1 A8 PB0 ...

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XTAL 8 PC0/A0/D0 9 PC1/A1/D1 10 PC2/A2/D2 11 PC3/A3/D3 12 PC4/A4/D4 13 PC5/A5/D5 14 PC6/A6/D6 15 PC7/A7/D7 16 RESET 17 XIRQ 18 IRQ 19 PD0/RxD 20 Figure 2 52-Pin PLCC Pin Assignments MC68HC11A8 MC68HC11A8TS/D 46 PE5/AN5 1 45 PE1/AN1 44 ...

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PA7/PAI/OC1 PA6/OC2/OC1 PA5/OC3/OC1 PA4/OC4/OC1 PA3/OC5/OC1 MODB/V STBY Figure 3 48-Pin DIP Pin Assignments 2 Operating Modes and Memory Maps In single-chip operating mode, the MC68HC11A8 is a monolithic microcontroller without external ad- dress or data buses. In expanded multiplexed operating ...

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PB7 PB6 PB5 PB4 PB3 PB2 PB1 PB0 MC68HC11A8 PC7 PC6 PC5 PC4 PC3 PC2 PC1 PC0 AS R/W E Figure 4 Address/Data Demultiplexing Special bootstrap mode allows special purpose programs to be entered into internal RAM. The boot- loader ...

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EXT $1000 EXT $B600 EXT $E000 $FFFF SINGLE EXPANDED CHIP MUX BOOTSTRAP MOTOROLA 8 EXT EXT EXT SPECIAL SPECIAL TEST Figure 5 Memory Map 0000 256 BYTES RAM (CAN BE REMAPPED TO ANY 4K PAGE BY THE INIT REGISTER) ...

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Table 3 MC68HC11A8 Register and Control Bit Assignments (Sheet (The register block can be remapped to any 4K boundary.) Bit 7 6 $1000 PA7 PA6 PA5 $1001 $1002 STAF STAI CWOM $1003 PC7 PC6 PC5 $1004 PB7 ...

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Table 3 MC68HC11A8 Register and Control Bit Assignments (Sheet (The register block can be remapped to any 4K boundary.) Bit 7 6 $1026 DDRA7 PAEN PAMOD $1027 Bit 7 6 $1028 SPIE SPE DWOM $1029 SPIF WCOL ...

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HPRIO — Highest Priority I-Bit Interrupt and Miscellaneous Bit RBOOT SMOD MDA RESET: — — — RBOOT, SMOD, and MDA reset depend on conditions at reset and can only be written in special modes (SMOD = 1). ...

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TEST1 — Factory Test Bit TILOP 0 OCCR RESET Test Modes Only TILOP — Test Illegal Opcode OCCR — Output Condition Code Register to Timer Port CBYP — Timer Divider Chain Bypass DISR — ...

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Resets and Interrupts The MC68HC11A8 has three reset vectors and 18 interrupt vectors. The reset vectors are as follows: • RESET, or Power-On • COP Clock Monitor Fail • COP Failure The eight interrupt vectors service 23 interrupt sources ...

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Table 4 Interrupt and Reset Vector Assignments Vector Address FFC0, C1 – FFD4, D5 Reserved FFD6, D7 SCI Serial System FFD8, D9 SPI Serial Transfer Complete FFDA, DB Pulse Accumulator Input Edge FFDC, DD Pulse Accumulator Overflow FFDE, DF Timer ...

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DLY — Enable Oscillator Start-Up Delay on Exit from STOP stabilization delay on exit from STOP 1 = Stabilization delay enabled on exit from STOP CME — Clock Monitor Enable 0 = Clock monitor disabled; slow clocks ...

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PSEL[3:0] 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111 CONFIG — COP, ROM, EEPROM Enables Bit RESET The bits of this register are ...

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Electrically Erasable Programmable Read-Only Memory (EEPROM) The 512 bytes of EEPROM in the MC68HC11A8 are located at $B600 through $B7FF. The EEON bit in CONFIG controls the presence or absence of the EEPROM in the memory map. When EEON ...

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ERASE — Erase/Normal Control for EEPROM 0 = Normal read or program mode 1 = Erase mode EELAT — EEPROM Latch Control 0 = EEPROM address and data bus configured for normal reads 1 = EEPROM address and data bus ...

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Parallel Input/Output The MC68HC11A8 has input/output lines, depending on the operating mode. Port A has three input-only pins, four output-only pins, and one bidirectional I/O pin. Port A shares functions with the tim- er system. Port ...

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PORTA — Port A Data Bit PA7 PA6 PA5 RESET: HiZ 0 0 Alt. Pin Func.: PAI OC2 OC3 And/or: OC1 OC1 OC1 PIOC — Parallel I/O Control Bit STAF STAI CWOM RESET: 0 ...

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STAF Clearing HNDS Sequence Simple Read PIOC 0 strobed with STAF=1 mode then read PORTCL Full input Read PIOC 1 handshake with STAF=1 then read PORTCL Full output Read PIOC 1 handshake with STAF=1 then write to PORTCL PORTC — ...

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DDRC — Data Direction Register for Port C Bit DDC7 DDC6 DDC5 RESET DDC[7:0] — Data Direction Register for Port Input 1 = Output PORTD — Port D Data Bit 7 ...

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Serial Communications Interface (SCI) The SCI, a universal asynchronous receiver transmitter (UART) serial communications interface, is one of two independent serial I/O subsystems in the MC68HC11A8. It has a standard NRZ format (one start, eight or nine data, and ...

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RECEIVER BAUD RATE CLOCK DDD0 PD0 PIN BUFFER AND CONTROL RxD DISABLE DRIVER RE M WAKEUP LOGIC SCCR1 SCI CONTROL 1 SCI Tx SCI INTERRUPT REQUESTS REQUEST Figure 7 SCI Receiver Block Diagram MOTOROLA SHIFT REGISTER DATA ...

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BAUD — Baud Rate Bit TCLR 0 SCP1 RESET TCLR — Clear Baud Rate Counters (TEST) SCP1, SCP0 — SCI Baud Rate Prescaler Selects Divide Internal SCP[1:0] Clock ...

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EXTAL OSCILLATOR AND CLOCK GENERATOR ( 4) XTAL E AS SCCR1 — SCI Control Register 1 Bit RESET — Receive Data Bit bit is set, R8 stores ...

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WAKE — Wake Up by Address Mark/Idle 0 = Wake up by IDLE line recognition 1 = Wake up by address mark (most significant data bit set) SCCR2 — SCI Control Register 2 Bit TIE TCIE RIE ...

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RDRF — Receive Data Register Full Flag Set if a received character is ready to be read from SCDR. Cleared by SCSR read with RDRF set fol- lowed by SCDR read. IDLE — Idle Line Detected Flag Set if the ...

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Serial Peripheral Interface (SPI) The SPI is one of two independent serial communications subsystems that allow the MCU to commu- nicate synchronously with peripheral devices and other microprocessors. Data rates can be as high as one half of the ...

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DDD[5:0] — Data Direction for Port D When DDRD bit 5 is zero and MSTR = 1 in SPCR, PD5/ general-purpose output and mode fault logic is disabled Input 1 = Output SPCR — Serial Peripheral ...

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SPR1 and SPR0 — SPI Clock Rate Selects SPR [1: SPSR — Serial Peripheral Status Register Bit SPIF WCOL 0 RESET SPIF — SPI Transfer Complete Flag Set when an ...

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Main Timer The main timer is based on a free-running 16-bit counter with a four-stage programmable prescaler. A timer overflow function allows software to extend the system's timing capability beyond the counter's 16-bit range. The timer has three channels ...

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PRESCALER DIVIDE BY TCNT (HI MCU 16-BIT FREE RUNNING PR1 PR0 E CLK 16-BIT TIMER BUS 16-BIT COMPARATOR = TOC1 (HI) TOC1 (LO) 16-BIT COMPARATOR = TOC2 (HI) TOC2 (LO) 16-BIT COMPARATOR = TOC3 (HI) ...

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CFORC — Timer Compare Force Bit 7 6 FOC1 FOC2 FOC3 RESET FOC5–FOC1 — Write ones to Force Compare( Not affected 1 = Output compare x action occurs, but OCxF flag bit not set OC1M — ...

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TOC1–TOC5 — Timer Output Compare $1016 Bit 15 14 $1017 Bit 7 6 $1018 Bit 15 14 $1019 Bit 7 6 $101A Bit 15 14 $101B Bit 7 6 $101C Bit 15 14 $101D Bit 7 6 $101E Bit 15 ...

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TMSK1 — Timer Interrupt Mask 1 Bit OC1I OC2I OC3I RESET OC1I–OC5I — Output Compare x Interrupt Enable If the OCxI enable bit is set when the OCxF flag bit is set, a hardware ...

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TFLG2 — Timer Interrupt Flag 2 Bit TOF RTIF PAOVF RESET Clear flags by writing a one to the corresponding bit position(s). TOF — Timer Overflow Flag Set when TCNT changes from $FFFF to ...

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Pulse Accumulator The MC68HC11A8 has an 8-bit counter that can be configured to operate as a simple event counter or for gated time accumulation, depending on the PAMOD bit in the PACTL register. The pulse accumu- lator counter can ...

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TMSK2 — Timer Interrupt Mask 2 Bit TOI RTII PAOVI RESET TOI — Timer Overflow Interrupt Enable Refer to 8 Main Timer. RTII — Real-Time Interrupt Enable Refer to 8 Main Timer. PAOVI — ...

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PAEN — Pulse Accumulator System Enable 0 = Pulse Accumulator disabled 1 = Pulse Accumulator enabled PAMOD — Pulse Accumulator Mode 0 = Event counter 1 = Gated time accumulation PEDGE — Pulse Accumulator Edge Control PAMOD ...

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Analog-to-Digital Converter The A/D converter system uses an all capacitive charge redistribution technique to convert analog sig- nals to digital values. The MC68HC11A8 A/D system is an 8-channel, 8-bit, multiplexed-input, succes- sive-approximation converter and is accurate to 1 least ...

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E CLOCK 12 E CYCLES SAMPLE ANALOG INPUT CONVERT FIRST CONVERT SECOND CHANNEL, UPDATE CHANNEL, UPDATE 0 ADR1 32 ANALOG INPUT PIN + ~20V – ~0.7V < INPUT PROTECTION DEVICE * THIS ANALOG SWITCH IS CLOSED ONLY DURING ...

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CD–CA — Channel Select D through A Table 10 A/D Converter Channel Assignments Channel Select Control Bits ...

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IRQE — IRQ Select Edge Sensitive Only Refer to 3 Resets and Interrupts. DLY — Enable Oscillator Start-Up Delay on Exit from STOP Refer to 3 Resets and Interrupts. CME — Clock Monitor Enable Refer to 3 Resets and Interrupts. ...

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Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of ...

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