MC14520BCP

Manufacturer Part NumberMC14520BCP
ManufacturerFreescale Semiconductor, Inc
MC14520BCP datasheet
 
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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Dual Up Counters
The MC14518B dual BCD counter and the MC14520B dual binary counter
are constructed with MOS P–channel and N–channel enhancement mode
devices in a single monolithic structure. Each consists of two identical,
independent, internally synchronous 4–stage counters. The counter stages
are type D flip–flops, with interchangeable Clock and Enable lines for
incrementing on either the positive–going or negative–going transition as
required when cascading multiple stages. Each counter can be cleared by
applying a high level on the Reset line. In addition, the MC14518B will count
out of all undefined states within two clock periods. These complementary
MOS up counters find primary use in multi–stage synchronous or ripple
counting applications requiring low power dissipation and/or high noise
immunity.
Diode Protection on All Inputs
Supply Voltage Range = 3.0 Vdc to 18 Vdc
Internally Synchronous for High Internal and External Speeds
Logic Edge–Clocked Design — Incremented on Positive Transition of
Clock or Negative Transition on Enable
Capable of Driving Two Low–power TTL Loads or One Low–power
Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î
Schottky TTL Load Over the Rated Temperature Range
Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î
MAXIMUM RATINGS*
(Voltages Referenced to V SS )
Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î
Symbol
Parameter
V DD
DC Supply Voltage
V in , V out
Input or Output Voltage (DC or Transient)
I in , I out
Input or Output Current (DC or Transient),
per Pin
P D
Power Dissipation, per Package†
T stg
Storage Temperature
T L
Lead Temperature (8–Second Soldering)
* Maximum Ratings are those values beyond which damage to the device may occur.
†Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/ _ C From 65 _ C To 125 _ C
Ceramic “L” Packages: – 12 mW/ _ C From 100 _ C To 125 _ C
TRUTH TABLE
Clock
Enable
Reset
1
0
Increment Counter
0
0
Increment Counter
X
0
X
0
0
0
1
0
X
X
1
Q0 thru Q3 = 0
X = Don’t Care
REV 3
1/94
MOTOROLA CMOS LOGIC DATA
Motorola, Inc. 1995
Value
Unit
– 0.5 to + 18.0
V
0.5 to V DD + 0.5
V
10
mA
500
mW
_ C
– 65 to + 150
_ C
260
Action
No Change
No Change
No Change
No Change
MC14518B
MC14520B
L SUFFIX
CERAMIC
CASE 620
P SUFFIX
PLASTIC
CASE 648
DW SUFFIX
SOIC
CASE 751G
ORDERING INFORMATION
MC14XXXBCP
Plastic
MC14XXXBCL
Ceramic
MC14XXXBDW
SOIC
T A = – 55 to 125 C for all packages.
BLOCK DIAGRAM
CLOCK
Q0
3
1
4
Q1
C
2
Q2
5
ENABLE
Q3
6
R
7
CLOCK
11
Q0
9
12
Q1
C
10
13
Q2
ENABLE
14
Q3
R
15
V DD = PIN 16
V SS = PIN 8
This device contains protection circuitry to
guard against damage due to high static
voltages or electric fields. However, pre-
cautions must be taken to avoid applications of
any voltage higher than maximum rated volt-
ages to this high–impedance circuit. For proper
operation, V in and V out should be constrained
v
v
to the range V SS
(V in or V out )
V DD .
Unused inputs must always be tied to an
appropriate logic voltage level (e.g., either V SS
or V DD ). Unused outputs must be left open.
MC14518B MC14520B
409

MC14520BCP Summary of contents