MC14560BCP

Manufacturer Part NumberMC14560BCP
ManufacturerFreescale Semiconductor, Inc
MC14560BCP datasheet
 


1
Page 1
2
Page 2
3
Page 3
4
Page 4
5
Page 5
6
Page 6
7
Page 7
8
Page 8
9
Page 9
10
Page 10
11
12
13
Page 1/13

Download datasheet (308Kb)Embed
Next
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
NBCD Adder
The MC14560B adds two 4–bit numbers in NBCD (natural binary coded
decimal) format, resulting in sum and carry outputs in NBCD code.
This device can also subtract when one set of inputs is complemented with
a 9’s Complementer (MC14561B).
All inputs and outputs are active high. The carry input for the least
significant digit is connected to V SS for no carry in.
Diode Protection on All Inputs
Supply Voltage Range = 3.0 Vdc to 18 Vdc
Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î
Capable of Driving Two Low–power TTL Loads or One Low–power
Schottky TTL Load Over the Rated Temperature Range
Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î
Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î
MAXIMUM RATINGS*
(Voltages Referenced to V SS )
Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î
Symbol
Parameter
V DD
DC Supply Voltage
V in , V out
Input or Output Voltage (DC or Transient)
I in , I out
Input or Output Current (DC or Transient),
per Pin
P D
Power Dissipation, per Package†
T stg
Storage Temperature
T L
Lead Temperature (8–Second Soldering)
* Maximum Ratings are those values beyond which damage to the device may occur.
†Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/ _ C From 65 _ C To 125 _ C
Ceramic “L” Packages: – 12 mW/ _ C From 100 _ C To 125 _ C
TRUTH TABLE*
Input
A4
A3
A2
A1
B4
B3
B2
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
1
0
1
0
0
0
0
1
0
1
1
1
0
1
0
0
1
1
1
0
1
0
1
0
0
0
0
1
0
0
1
1
0
1
0
0
1
0
0
1
1
0
0
* Partial truth table to show logic operation for representative input values.
This device contains protection circuitry to guard against damage
due to high static voltages or electric fields. However, precautions must
be taken to avoid applications of any voltage higher than maximum rated
voltages to this high-impedance circuit. For proper operation, V in and
V out should be constrained to the range V SS
Unused inputs must always be tied to an appropriate logic voltage
level (e.g., either V SS or V DD ). Unused outputs must be left open.
REV 3
REV 0
1/94
1/94
MOTOROLA CMOS LOGIC DATA
Motorola, Inc. 1995
Motorola, Inc. 1994
Value
Unit
– 0.5 to + 18.0
V
– 0.5 to V DD + 0.5
V
10
mA
500
mW
_ C
– 65 to + 150
_ C
260
Output
B1
C in
C out
S4
S3
S2
S1
0
0
0
0
0
0
0
0
1
0
0
0
0
1
1
0
0
0
1
1
1
1
1
0
1
0
0
0
0
0
1
0
0
0
1
0
1
1
0
0
1
0
1
0
1
0
0
1
1
0
0
1
0
1
0
0
1
1
1
1
0
0
1
(V in or V out )
V DD .
MC14559B
See Page 398
MC14560B
L SUFFIX
CERAMIC
CASE 620
P SUFFIX
PLASTIC
CASE 648
D SUFFIX
SOIC
CASE 751B
ORDERING INFORMATION
MC14XXXBCP
Plastic
MC14XXXBCL
Ceramic
MC14XXXBD
SOIC
T A = – 55 to 125 C for all packages.
BLOCK DIAGRAM
7
C in
S1
13
A1
15
14
B1
S2
12
A2
1
2
B2
S3
11
3
A3
B3
4
S4
10
5
A4
B4
C out
9
6
V DD = PIN 16
V SS = PIN 8
MC14560B
1

MC14560BCP Summary of contents