VT82C686B ETC-unknow, VT82C686B Datasheet - Page 51

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VT82C686B

Manufacturer Part Number
VT82C686B
Description
Manufacturer
ETC-unknow
Datasheet
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Super-I/O Configuration Index / Data Registers
Super-I/O configuration registers are accessed by performing
I/O operations to / from an index / data pair of registers in
system I/O space at port addresses 3F0h and 3F1h.
configuration registers accessed using this mechanism are used
to configure the Super-I/O registers (parallel port, serial ports,
IR port, and floppy controller).
Super I/O configuration is accomplished in three steps:
Port 3F0h – Super-I/O Configuration Index ................... RW
Function 0 PCI configuration space register Rx85[1] must be
set to 1 to enable access to the Super-I/O configuration
registers.
Port 3F1h – Super-I/O Configuration Data .................... RW
This register shares a port with the Floppy Status Port (which
is read only). This port is accessible only when Rx85[1] is set
to 1 (the floppy status port is accessed if Rx85[1] = 0).
Revision 1.71 June 9, 2000
1) Enter configuration mode (set Function 0 Rx85[1] = 1)
2) Configure the chip
3) Exit configuration mode (set Function 0 Rx85[1] = 0)
7-0
7-0
a) Write index to port 3F0
b) Read / write data from / to port 3F1
c) Repeat a and b for all desired registers
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Index value
Data value
The
-45-
Super-I/O Configuration Registers
These registers are accessed via the port 3F0 / 3F1 index / data
register pair using the indicated index values below
Index E0 – Super-I/O Device ID (3Ch) ............................ RO
Index E1 – Super-I/O Device Revision (00h) ................... RO
Index E2 – Super-I/O Function Select (03h) ................... RW
Index E3 – Floppy Controller I/O Base Address (00h) .. RW
Index E6 – Parallel Port I/O Base Address (00h) ........... RW
If EPP is not enabled, the parallel port can be set to 192
locations on 4-byte boundaries from 100h to 3FCh. If EPP is
enabled, the parallel port can be set to 96 locations on 8-byte
boundaries from 100h to 3F8h.
Index E7 – Serial Port 1 I/O Base Address (00h) ........... RW
Index E8 – Serial Port 2 I/O Base Address (00h) ........... RW
7-0
7-0
7-5
1-0
7-2
1-0
7-0
7-1
7-1
4
3
2
0
0
Super-I/O ID ........................................ default = 3Ch
Super-I/O Revision Code .........................default = 0
Reserved
Floppy Controller Enable
Serial Port 2 Enable
Serial Port 1 Enable
Parallel Port Mode / Enable
I/O Address 9-4.........................................default = 0
Must be 0
I/O Address 9-2.........................................default = 0
I/O Address 9-3.........................................default = 0
Must be 0
I/O Address 9-3.........................................default = 0
Must be 0
00 Unidirectional mode
01 ECP
10 EPP
11 Parallel Port Disable .............................. default
0
1
0
1
0
1
Disable................................................... default
Enable
Disable................................................... default
Enable
Disable................................................... default
Enable
Register Descriptions - Super-I/O I/O Ports
........................................always reads 0
..............................................default = 0
..............................................default = 0
..............................................default = 0
VT82C686B

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