VT82C686B

Manufacturer Part NumberVT82C686B
ManufacturerETC-unknow
VT82C686B datasheet
 


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Miscellaneous / General Purpose I/O
Offset 73-70 - Subsystem ID ............................................ WO
31-0 Subsystem ID / Vendor ID................. always reads 0
Contents may be read at offset 2C.
Offset 74 – GPIO Control 1 .............................................. RW
7
Reserved (Do Not Program).................... default = 0
6
SERIRQ Pin
0
SERIRQ input from DRQ2 (Pin H3)......default
1
SERIRQ input from DACK5# (Pin L4)
5
GPIOD Direction (Pin U8)
0
Input .....................................................default
1
Output (GPO11)
4
GPIOC Direction (Pin V14)
0
Input .....................................................default
1
Output
3
GPIOB Direction (Pin U12)
0
Input .....................................................default
1
Output
2
GPIOA Direction (Pin T14)
0
Input .....................................................default
1
Output
1
THRM Enable (Pin T11)
0
PME# / GPI5 (see Func 4 Rx48[5]) .......default
1
THRM
0
GPI0 / IOCHCK# Select
0
GPI0 .....................................................default
1
IOCHCK#
Revision 1.71 June 9, 2000
Offset 75 – GPIO Control 2 ............................................. RW
7
GPO7 Enable (Pin T7)
0
Pin defined as SLP#............................... default
1
Pin defined as GPO7
6
GPO6 Enable (Pin ??)
0
Pin defined as ?? .................................... default
1
Pin defined as GPO6
5
GPO5 Enable (Pin V12)
0
Pin defined as PCISTP# ........................ default
1
Pin defined as GPO5
4
GPO4 Enable (Pin Y12)
0
Pin defined as CPUSTP# ....................... default
1
Pin defined as GPO4
3
FDC External IRQ / DRQ Via DACK2# / DRQ2
0
Pin G5 is FDCIRQ, pin H3 is FDCDRQ ..... def
1
Pin G5 is DACK2# or other alternate function
Pin H3 is DRQ2 or other alternate function
(see bits 1-2 and Rx76[7-6])
2
GPO25 Enable (Pin G5)
0
See bit-3 & Rx76[7-6] for G5 pin function.. def
1
Pin G5 defined as GPO25
1
GPO24 Enable (Pin H3)
0
See bit-3 & Rx68[3] for H3 pin function..... def
1
Pin H3 defined as GPO24
0
Positive Decode
0
Subtractive Decode................................ default
1
Positive Decode
-62-
Function 0 Registers - PCI to ISA Bridge
VT82C686B