VT82C686B

Manufacturer Part NumberVT82C686B
ManufacturerETC-unknow
VT82C686B datasheet
 


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Page 78/128

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Offset 54 – UltraDMA FIFO Control (06h) .................... RW
7-5
Reserved
........................................ always reads 0
4
One Frame For Each PCI Request For IDE PCI
Master Cycles
0
Disable ...................................................default
1
Enable
........................................ always reads 0
3
Reserved
2
Change Drive to Clear All FIFO & Internal States
0
Disable
1
Enable.....................................................default
........................................ always reads 0
1
Reserved
0
Complete DMA Cycle with Transfer Size Less
Than FIFO Size
0
Enable.....................................................default
1
Disable
Revision 1.71 June 9, 2000
Offset 61-60 - Primary Sector Size (0200h) .................... RW
15-12 Reserved
........................................always reads 0
11-0 Number of Bytes Per Sector ...def=200h (512 bytes)
Offset 69-68 - Secondary Sector Size (0200h) ................. RW
15-12 Reserved
........................................always reads 0
11-0 Number of Bytes Per Sector ...def=200h (512 bytes)
-72-
Function 1 Registers - Enhanced IDE Controller
VT82C686B