F65510

Manufacturer Part NumberF65510
DescriptionControllers, Flat Panel VGA Controller
ManufacturerIntel Corporation
F65510 datasheet
 
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Page 110/154:

SETUP / DISABLE CONTROL REGISTER

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SETUP / DISABLE CONTROL REGISTER

(XR70)
Read/Write at I/O Address 3B7h/3D7h
Index 70h
D7 D6 D5 D4 D3 D2 D1 D0
Reserved (0)
3C3/46E8 Register Disable
6-0
Reserved (0)
7
3C3 / 46E8 Register Disable
0 In the MC and PI bus, port 3C3h
works as defined to provide control of
VGA disable (the DISA/ pin may also
be used to disable the VGA). In the
PC bus, port 46E8h works as defined
to provide control of VGA disable
and setup mode (DISA/ and SETUP/
functions are not provided on pins).
1 In the MC and PI bus, writes to I/O
port 3C3 have no effect (the VGA
can still be disabled via the DISA/
pin). In the PC bus, writes to I/O port
46E8h have no effect (the VGA
remains enabled and will not go into
setup
Note:Writes to register 46E8 are only
effective in PC bus configurations (46E8 is
ignored in MC and PI bus configurations
independent of the state of this bit). Writes
to 3C3 are only effective in MC and PI bus
configurations (3C3 is ignored in PC bus
configurations independent of the state of
this bit).
Reads from ports 3C3 and 46E8h have no effect
independent of the programming of this register
(both 3C3 and 46E8h are write-only registers).
This register is cleared by RESET.
Revision 0.7
FP COMPENSATION
DIAGNOSTIC REGISTER (XR7D)
Read/Only at I/O Address 3B7h/3D7h
Index 7Dh
D7 D6 D5 D4 D3 D2 D1 D0
These bits are reserved for future use and currently
all read back zero.
mode).
106
Extension Registers
Reserved (0)
Preliminary 65510