ADV7196KS Analog Devices, ADV7196KS Datasheet

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ADV7196KS

Manufacturer Part Number
ADV7196KS
Description
Multi-format progressive Scan/HDTV Eccoder with three 11-Bit DACs and Macrovision
Manufacturer
Analog Devices
Datasheet

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Part Number:
ADV7196KS
Manufacturer:
AD
Quantity:
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Part Number:
ADV7196KS
Manufacturer:
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Quantity:
20 000
a
INPUT FORMATS
OUTPUT FORMATS
PROGRAMMABLE FEATURES
Internal Testpattern Generator with Color Control
Y/C delay (+/-)
Gamma Correction
Individual DAC on/off control
Preliminary Technical Data
YCrCb in 2x10-Bit (4:2:2) or 3x10-Bit (4:4:4) format
compliant to SMPTE-293M (525p), ITU-R.BT1358
Async Timing Mode
RGB in 3x10 Bit 4:4:4 format
YPrPb Progressive Scan (EIA-770.1, EIA-770.2)
YPrPb HDTV (EIA 770.3)
RGB levels compliant to RS-170 and RS-343A
and any other High Definition standard using
(625p), SMPTE274M (1080i), SMPTE296M (720p)
Multi-format Progressive Scan/HDTV
Encoder with three 11-Bit DACs and
54MHz Output (2xOversampling)
Sharpness filter with programmable gain/attenuation
Programmable Adaptive Filter Control
Undershoot Limiter
VBI Open Control
Macrovision Rev 1.0 (525p)
CGMS-A (525p)
2 Wire Serial MPU Interface
Single Supply +5V/+3.3 V Operation
52-PQFP package
APPLICATIONS
Progressive Scan / HDTV Display Devices
DVD Players
Progressive Scan/HDTV Projection Systems
Digital Video Systems
High Resolution Color Graphics
Image Processing/ Instrumentation
Digital Radio Modulation/ Video Signal Reconstruction
One Technology Way, P.O. Box 9106, Norwood. MA 02062-9106,
U.S.A.
Tel: 617/329-4700
Fax: 617/326-8703
HORIZONTALSYNC
VERTICA L SYNC
BLANKING
Y0-Y9
Cr0-9
Cb 0-9
CLKIN
RESET
TESTPATTERN
GENERAT OR
&
DELAY
&
GAMMA
CORRECTION
FUNCTIONAL BLOCK DIAGRAM
SHARPNESS
FILT ER CONTROL
&
ADAPTIVE
FILT ER CONTROL
World Wide Web Site: http://www.analog.com
4:2:2 to
4:4:4
4:2:2 to
4:4:4
TIMING
GENERAT OR
I2C MPU PORT
CGMS
MACROVISION
2XINT ER-
POLAT ION
© Analog Devices, Inc., 2000
Macrovision
SYNC
GENERATOR
ADV7196
DAC C ONTROL
BLOCK
11-BIT
DAC
11-BIT
DAC
11-BIT
DAC
DAC B
DAC C
VREF
RSET
COMP
DAC A (Y)

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ADV7196KS Summary of contents

Page 1

... World Wide Web Site: http://www.analog.com Fax: 617/326-8703 Macrovision ADV7196 CGMS MACROVISION 11-BIT DAC A (Y) DAC 2XINT ER- 11-BIT POLAT ION DAC B DAC 11-BIT DAC C DAC VREF DAC C ONTROL RSET BLOCK COMP TIMING SYNC GENERAT OR GENERATOR I2C MPU PORT © Analog Devices, Inc., 2000 ...

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ADV7196 5V SPECIFICATIONS Notes Preliminary Information ( ± 5 1.235 2470 AA REF SET o All specifications MIN MAX 110 C. MAX ...

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ADV7196 3.3V SPECIFICATIONS ( 3.3V ± 5 All specifications 110 C. MAX Preliminary Information = 1.235 2470 , R =300 REF SET LOAD ...

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ADV7196 5V DYNAMIC-SPECIFICATIONS 3.3V DYNAMIC-SPECIFICATIONS Preliminary Information ( ± 5 1.235 2470 , R AA REF SET o All specifications MIN MAX ...

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ADV7196 5V TIMING–SPECIFICATIONS Notes Preliminary Information ( ± 5 1.235 2470 , R AA REF SET o o All specifications MIN MAX ...

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ADV7196 3.3V TIMING–SPECIFICATIONS Notes Preliminary Information (V = +3.3V ± 5 1.235 REF o All specifications MIN MAX 110 C. MAX = 2470 , ...

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ADV7196 VREF 39 VDD 1 Pin Id RSET Y[ COMP Y[ Y[2] 36 DAC Y[3] VAA 5 34 DAC A ...

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ADV7196 HSYNC/ SYNC RESET VSYNC/ HSYNC VSYNC Preliminary Information ...

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ADV7196 Preliminary Information ...

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ADV7196 Fig xx. ADV7196 Slave Address SLAVE AD DR SEQ EAD S SLAVE AD DR SEQ STA RT BIT P ...

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ADV7196 SR7 SR6 SR5 SR4 SR3 SR7 ZERO SHOULD ERE SUBA DRE IST ...

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ADV7196 Preliminary Information ...

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ADV7196 ...

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ADV7196 Figure xx: Async Timing Mode - Programming Input Control signals for SMPTE295M compatibility 525 1 ...

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ADV7196 ...

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ADV7196 PrP ...

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ADV7196 MR37 MR36 MR37 ZERO MUST BE WRITTEN TO THIS BIT INTERPOLATION MR36 DISABLE 0 ENABLE 1 MR35 MR34 MR33 MR32 DAC B CONTROL MR32 MR34 ZERO MUST BE 0 POWER-DOWN WRITTEN TO 1 NORMAL THIS BIT CLKOUT ENABLE DAC ...

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ADV7196 47 ITTE ...

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ADV7196 In 4:4:4 input mode Color data MR53 Analog Output input on pins: signal: Cr 9-0 0 Dac B Cb/Cr 9-0 0 Dac C Cr 9-0 1 Dac C Cb/Cr 9-0 1 Dac B In 4:2:2 input mode Color data ...

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ADV7196 HIT ...

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ADV7196 1.5 1.4 1.3 1.2 1.1 1 0.9 0.8 0.7 0.6 0 Figure xx 1.5 1.4 1.3 1.2 1.1 1 0.9 0.8 0.7 0.6 0.5 0 Figure ...

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ADV7196 µ µ ...

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ADV7196 Preliminary Information orr ection utput Input tio n Blo ck O utput to a ...

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ADV7196 1.6 1.5 1.4 1.3 1.2 1 Fre Hz) Figure xx Frequency response in Sharpness Filter mode with Ka=+3 and Kb=+7 when step input is applied ...

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ADV7196 d( ...

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ADV7196 Preliminary Information ...

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ADV7196 Preliminary Information ...

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ADV7196 Preliminary Information ...

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ADV7196 xxxxxxxxxxxxxxxxxxxx xxxxx 243 ...

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ADV7196 ...

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ADV7196 PrP ...

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ADV7196 MR37 MR37-36 ZER0 MUST BE WRITTEN TO THESE BITS MR36 MR35 MR34 MR33 DAC B CONTROL MR34 0 POWER-DOWN 1 NORMAL DAC C CONTROL DAC A CONTROL MR35 MR33 POWER-DOWN 0 POWER-DOWN 0 NORMAL 1 NORMAL 1 Figure xx: ...

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ADV7196 RIT T ...

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ADV7196 In 4:4:4 input mode Color data MR53 input on pins: Cr 9-0 0 Cb/Cr 9 9-0 1 Cb/Cr 9 4:2:2 input mode Color data MR53 input on pins Cb/Cr 9-0 ...

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ADV7196 Preliminary Information ...

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ADV7196 " " ...

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ADV7196 ...

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ADV7196 E IA- 770. 2, stan IA- 770.2 , sta n dard for P r ...

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ADV7196 Figure xx Figure xx EIA- 770. 3, standard Output V oltage. Input Code - EIA- 770.3 , standard for Pr/P b ...

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ADV7196 CLOCK PIXEL INPUT DATA t 11 Figure ... 4:4:4 RGB input data format timing diagram Preliminary Information ... Rxxx Rxxx ... ...

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ADV7196 CLOCK PIXEL INPUT DATA Figure xx CLOCK PIXEL INPUT DATA ... Cb0 Cr0 Cb1 Cr1 Clock High time t10 - Clock Low time t11 - Data ...

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ADV7196 PIX Figure ...

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ADV7196 ...

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ADV7196 VIDE ...

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ADV7196 Figure 1. MPU Port Timing Diagram Preliminary Information ...

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ADV7196 LIN ens ions 52-Lead Plastic Q uad Flatpack (S-52 ...

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