AT32UC3A464 Atmel Corporation, AT32UC3A464 Datasheet - Page 156

• Manufacturer Part Number: AT32UC3A464
• Manufacturer: Atmel Corporation

Specifications of AT32UC3A464

• Flash (kbytes): 64 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 66 MHz
• Cpu: 32-bit AVR
• Hardware Qtouch Acquisition: No
• Usb Transceiver: 1
• Usb Speed: Hi-Speed
• Usb Interface: Device + OTG
• Spi: 6
• Twi (i2c): 2
• Uart: 4
• Ssc: 1
• Sd / Emmc: 2
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 128
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.0 to 3.6
• Operating Voltage (vcc): 3.0 to 3.6
• Fpu: No
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

Table of contents
32002F–03/2010
1
2
3
4
Introduction .............................................................................................. 2
Programming Model ................................................................................ 7
Pipeline ................................................................................................... 20
Floating Point Hardware ........................................................................ 40
1.1The AVR family .........................................................................................................2
1.2 The AVR32 Microprocessor Architecture .................................................................2
1.3Exceptions and Interrupts ..........................................................................................3
1.4Java Support .............................................................................................................3
1.5FlashVault .................................................................................................................3
1.6Microarchitectures .....................................................................................................3
1.7The AVR32UC architecture .......................................................................................4
1.8AVR32UC CPU revisions ..........................................................................................5
2.1Architectural compatibility ..........................................................................................7
2.2Implementation options .............................................................................................7
2.3Register file configuration ..........................................................................................7
2.4The Status Register ...................................................................................................8
2.5System registers ......................................................................................................11
2.6COMPARE and COUNT registers ...........................................................................17
2.7Configuration Registers ...........................................................................................17
3.1Overview .................................................................................................................20
3.2Prefetch unit ............................................................................................................20
3.3Decode unit .............................................................................................................20
3.4EX pipeline stage ....................................................................................................21
3.5Support for unaligned addresses ............................................................................22
3.6Forwarding hardware and hazard detection ............................................................22
3.7Event handling .........................................................................................................22
3.8Special concerns .....................................................................................................24
3.9Entry points for events .............................................................................................26
3.10Interrupt latencies ..................................................................................................37
3.11NMI latency ...........................................................................................................38
4.1Compliance .............................................................................................................40
4.2Operations ...............................................................................................................40
4.3Instruction set ..........................................................................................................42
AVR32
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