AT83C5135 Atmel Corporation, AT83C5135 Datasheet - Page 79

• Manufacturer Part Number: AT83C5135
• Manufacturer: Atmel Corporation

Specifications of AT83C5135

• Max. Operating Frequency: 32 MHz
• Cpu: 8051-12C
• Max I/o Pins: 34
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 1
• Twi (i2c): 1
• Uart: 1
• Sram (kbytes): 1.25
• Eeprom (bytes): 512
• Operating Voltage (vcc): 2.7 to 3.6
• Timers: 4
• Mask Rom (kbytes): 16
• Watchdog: Yes

Figure 19-4. Data Transmission Format (CPHA = 0)
Figure 19-5. Data Transmission Format (CPHA = 1)
Figure 19-6. CPHA/SS Timing
19.3.3
7683C–USB–11/07
Error Conditions
MOSI (from Master)
SCK cycle number
MISO (from Slave)
MOSI (from Master)
SCK (CPOL = 0)
SCK (CPOL = 1)
MISO (from Slave)
SCK cycle number
SPEN (internal)
SCK (CPOL = 0)
SCK (CPOL = 1)
Capture point
SPEN (internal)
SS (to Slave)
Capture point
SS (to Slave)
As shown in
must begin driving its data before the first SCK edge, and a falling edge on the SS pin is used to
start the transmission. The SS pin must be toggled high and then low between each byte trans-
mitted (Figure 19-2).
Figure 19-6
ing its MOSI pin on the first SCK edge. Therefore the Slave uses the first SCK edge as a start
transmission signal. The SS pin can remain low between transmissions
mat may be preferable in systems having only one Master and only one Slave driving the MISO
data line.
The following flags in the SPSTA signal SPI error conditions:
MISO/MOSI
(CPHA = 0)
(CPHA = 1)
Master SS
Slave SS
Slave SS
shows an SPI transmission in which CPHA is’1’. In this case, the Master begins driv-
Figure
MSB
MSB
MSB
1
MSB
1
19-5, the first SCK edge is the MSB capture strobe. Therefore the Slave
2
bit6
bit6
2
bit6
Byte 1
bit6
3
bit5
bit5
3
bit5
bit5
bit4
4
bit4
bit4
4
bit4
Byte 2
bit3
bit3
5
bit3
bit3
5
6
bit2
bit2
6
bit2
bit2
Byte 3
7
bit1
bit1
7
bit1
bit1
AT83C5134/35/36
LSB
8
LSB
LSB
8
LSB
(Figure
19-1). This for-
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