AT86RF230 Atmel Corporation, AT86RF230 Datasheet - Page 14

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AT86RF230

Manufacturer Part Number
AT86RF230
Description
Manufacturer
Atmel Corporation
Datasheet

Specifications of AT86RF230

Crypto Engine
No
Operating Voltage (vcc)
1.8 to 3.6
Frequency Band
2.4 GHz
Max Data Rate (mb/s)
0.25
Antenna Diversity
No
External Pa Control
No
Power Output (dbm)
3
Receiver Sensitivity (dbm)
-101
Receive Current Consumption (ma)
16.0
Transmit Current Consumption (ma)
17.0
Link Budget (dbm)
104

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Figure 6-8. Packet Structure - Frame Buffer Read Access
Figure 6-9. Example SPI Sequence - Frame Buffer Write Sequence of a Frame with 4-byte PSDU
Figure 6-10. Example SPI Sequence - Frame Buffer Read Sequence of a Frame with 4-byte PSDU
6.2.3 SRAM Access Mode
SCLK
MOSI
MISO
SCLK
MOSI
MISO
14
SEL
SEL
AT86RF230
COMMAND
COMMAND
XX
XX
PHR
The number of bytes n for one Frame Buffer access is calculated as follow:
Receive:
Transmit:
The maximum value of frame_length is 127 bytes. That means that n ≤ 130 for Frame
Buffer read access and n ≤ 129 for Frame Buffer write access. Each read or write of a
data byte increments automatically the address counter of the Frame Buffer until the
access is terminated by setting SEL = H.
Figure 6-9 and Figure 6-10 illustrate an example SPI sequence of a Frame Buffer
access to write and read a frame with 4-byte PSDU respectively.
XX
Access violations during a Frame Buffer write or read access are indicated by a
TRX_UR interrupt. For further details refer to section 9.3.3.
The SRAM access mode allows access to certain bytes within the Frame Buffer. This
may reduce SPI traffic.
PHR
XX
PSDU 1
PSDU 1
XX
XX
n = 3 + frame_length
[command byte, frame length byte, PSDU data, LQI byte]
n = 2 + frame_length
[command byte, frame length byte, PSDU data]
PSDU 2
PSDU 2
XX
XX
PSDU 3
PSDU 3
XX
XX
PSDU 4
PSDU 4
XX
XX
5131E-MCU Wireless-02/09
LQI
XX

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