AT89C5131A-L Atmel Corporation, AT89C5131A-L Datasheet - Page 3

• Manufacturer Part Number: AT89C5131A-L
• Manufacturer: Atmel Corporation

Specifications of AT89C5131A-L

• Flash (kbytes): 32 Kbytes
• Max. Operating Frequency: 48 MHz
• Cpu: 8051-12C
• Max I/o Pins: 34
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 1
• Twi (i2c): 1
• Uart: 1
• Sram (kbytes): 1.25
• Eeprom (bytes): 1024
• Self Program Memory: API
• Operating Voltage (vcc): 3.0 to 3.6
• Timers: 4
• Isp: UART/USB
• Watchdog: Yes

9. PLL Filter Values for USB Certification
10. Powerdown Mode Generates a Reset
11. Wrong Latch of Hardware Conditions
12. USB Interface
13. USB Interface
14. Stretch MOVX Does Not Work
4380F–USB–03/08
The current filter values recommended in the datasheet, R1/C1/C2= 100Ω/10nF/2.2nF, cannot pass USB certification,
due to signal rate (11.95MHz) out of specification (11.97 MHz - 12.03MHz) .
Workaround
Apply new PLL filter values: R1/C1/C2= 560Ω/820pF/150pF.
A reset is generated when entering the Powerdown mode.
Workaround
None.
If the Reset input is controlled externally and is not synchronous with internal clock, the Hardware Conditions could be
latched in the wrong status. These hardware conditions are used in the boot process and the device may not boot in
the right target (Bootloader or Application)
Workaround
1) The internal synchronous Reset provided by the POR/PFD feature guarantees a reliable Reset at power-up.
2) The internal Hardware Watchdog Reset can also be used without failure.
Sometimes and randomly when the USB device is plugged to the USB interface, it may not enumerate properly. It
appears that the device remains in suspend state.
Workaround
After enabling the USB macro by means of bit USBE bit in USBCON, it is necessary to clear just after the bit WUPCPU
in USBINT register
The WUPCPU bit in USBINT register is set by the hardware when the USB macro exits from suspend mode. The firm-
ware acknowledges this event by clearing the WUPCPU bit in the interrupt routine. This bit fails to be cleared by
software, therefore the USB Wake-up interrupt is not acknowledged and always executed until next suspend state.
Workaround
Disable WakeUp interrupt after resume sequence.
When setting M0 bit in AUXR SFR (08Eh), the RD or WR pulse on a MOVX instruction on external memory is not 30
XTAL length but always standard 6 XTAL length. Thus slow external peripherals mapping in the XDATA space could
not work properly.
Workaround
None.
–
–
Bad Suspend Resume Initialization
CPU Wake-up Interrupt Not Cleared
C2
VSS
C1
R1
VSS
PLLF
AT89C5131A-L Errata
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