AT89C51RD2 Atmel Corporation, AT89C51RD2 Datasheet - Page 2
AT89C51RD2
Manufacturer Part Number
AT89C51RD2
Description
Manufacturer
Atmel Corporation
Specifications of AT89C51RD2
Flash (kbytes)
64 Kbytes
Max. Operating Frequency
60 MHz
Cpu
8051-12C
Max I/o Pins
32
Spi
1
Uart
1
Sram (kbytes)
2
Self Program Memory
API
Operating Voltage (vcc)
2.7 to 5.5
Timers
4
Isp
UART
Watchdog
Yes
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6. Boot Process - Upper 2Kbytes Execution with BLJB = 0
7. Flash/EEPROM - First Read after Load Disturbed
2
MOVX @DPTR,A ;Load Column latches
NOP ; ADDED INSTRUCTION
Use the same mode for the two timers..
In case of Boot process with BLJB = 0 and BSB = 00, the User Application is executed but the program space located
in the upper 2KBytes of the 64KBytes on chip Flash memory cannot be executed. This is due to ENBOOT bit which is
set in this Bootloader flow.
Workaround
Clear ENBOOT bit at the beginning of user application software.
In the ‘In-Application Programming’ mode from the Flash, if the User software application loads the Column Latch Area
prior to calling the programming sequence in the UART Bootloader.
The ‘Read after load’ issue leads to a wrong Opcode Fetch during the column latch load sequence.
Workaround
Update of the Flash API Library. A NOP instruction has to be inserted after the load instruction.
AT89C51RD2/ED2
4257E–8051–08/07