AT89LP2052 Atmel Corporation, AT89LP2052 Datasheet - Page 30

• Manufacturer Part Number: AT89LP2052
• Manufacturer: Atmel Corporation

Specifications of AT89LP2052

• Flash (kbytes): 2 Kbytes
• Max. Operating Frequency: 20 MHz
• Cpu: 8051-1C
• Max I/o Pins: 15
• Spi: 1
• Uart: 1
• Sram (kbytes): 0.25
• Operating Voltage (vcc): 2.4 to 5.5
• Timers: 2
• Isp: SPI
• Watchdog: Yes

16.6
17. External Interrupts
30
Timer/Counter Pin Configuration
AT89LP2052/LP4052
Figure 16-6. Timer/Counter 1 PWM Mode 0
Figure 16-7. Timer/Counter 1 PWM Mode 1
In order to use the counter input function or pulse width modulation output feature of Timer 0 or
Timer 1, the Timer pins T0 (P3.4) and T1 (P3.5) must be configured appropriately. See
15.7 “Port Alternate Functions” on page
should be configured as input-only, or as bidirectional with P3.4 or P3.5 set to “1”. The counter
function may also be triggered by an internal event if T0 or T1 is configured in a bidirectional or
output mode and the port bit is toggled accordingly. To enable a PWM output on T0 or T1, the
pin must be configured in a bidirectional or output mode with P3.4 or P3.5 set to “1”. Setting the
PWM0EN or PWM1En bits in TCONB will not automatically configure the pins as outputs. The
PWM outputs will use a full CMOS push-pull driver if they are in the quasi-bidirectional or output
configurations.
The INT0 and INT1 external interrupt sources can be programmed to be level-activated or tran-
sition-activated by setting or clearing bit IT1 or IT0 in Register TCON. If ITx = 0, external
interrupt x is triggered by a detected low at the INTx pin. If ITx = 1, external interrupt x is nega-
tive edge-triggered. In this mode if successive samples of the INTx pin show a high in one cycle
INT1 Pin
INT1 Pin
GATE
GATE
TR1
TR1
OSC
OSC
Control
Control
23. For the external counter input function, T0 or T1
PSC1
(8 Bits)
(8 Bits)
RL1
TL1
(8 Bits)
TL1
(8 Bits)
(8 Bits)
OCR1
(8 Bits)
(8 Bits)
OCR1
RH1
TH1
RH1
TH1
=
=
3547J–MICRO–10/09
T1
T1
Section