AT89LP2052 Atmel Corporation, AT89LP2052 Datasheet - Page 57

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AT89LP2052

Manufacturer Part Number
AT89LP2052
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of AT89LP2052

Flash (kbytes)
2 Kbytes
Max. Operating Frequency
20 MHz
Cpu
8051-1C
Max I/o Pins
15
Spi
1
Uart
1
Sram (kbytes)
0.25
Operating Voltage (vcc)
2.4 to 5.5
Timers
2
Isp
SPI
Watchdog
Yes

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23. Programming the Flash Memory
3547J–MICRO–10/09
The AT89LP2052/LP4052 offers 2/4K bytes of In-System Programmable (ISP) non-volatile
Flash code memory. In addition, the device contains a 32-byte User Signature Row and a
32-byte read-only Atmel Signature Row. The memory organization is shown in
Memory is divided into pages of 32 bytes each. A single read or write command may only
access a single page in the memory.
Table 23-1.
The AT89LP2052/LP4052 provides two flexible interfaces for programming the Flash memory: a
parallel interface which uses 10 pins; and a serial interface which uses the 4 SPI pins. The par-
allel and serial programming algorithms are identical. Both interfaces support the same
command format where each command is issued to the device one byte at a time. Commands
consist of a preamble byte for noise immunity, an opcode byte, two address bytes, and from 1 to
32 data bytes.
Figure 23-1. Command Sequence Flow Chart
AT89LP2052
AT89LP4052
Device #
Memory Organization
Figure 23-1
Code Size
2K bytes
4K bytes
shows a simplified flow chart of a command sequence.
Input Preamble
Input Address
Input Address
Input Opcode
Input/Output
High Byte
Low Byte
(AAh)
Data
Page Size
32 bytes
32 bytes
Address +1
AT89LP2052/LP4052
# Pages
128
64
Address Range
0000H - 07FFH
0000H - 0FFFH
Table
23-1. The
57

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