ATmega329

Manufacturer Part NumberATmega329
ManufacturerAtmel Corporation
ATmega329 datasheets
 

Specifications of ATmega329

Flash (kbytes)32 KbytesPin Count64
Max. Operating Frequency16 MHzCpu8-bit AVR
# Of Touch Channels16Hardware Qtouch AcquisitionNo
Max I/o Pins54Ext Interrupts17
Usb SpeedNoUsb InterfaceNo
Spi2Twi (i2c)1
Uart1Segment Lcd100
Graphic LcdNoVideo DecoderNo
Camera InterfaceNoAdc Channels8
Adc Resolution (bits)10Adc Speed (ksps)15
Analog Comparators1Resistive Touch ScreenNo
Temp. SensorNoCrypto EngineNo
Sram (kbytes)2Eeprom (bytes)1024
Self Program MemoryYESDram MemoryNo
Nand InterfaceNoPicopowerNo
Temp. Range (deg C)-40 to 85I/o Supply Class1.8 to 5.5
Operating Voltage (vcc)1.8 to 5.5FpuNo
Mpu / Mmuno / noTimers3
Output Compare Channels4Input Capture Channels1
Pwm Channels432khz RtcYes
Calibrated Rc OscillatorYes  
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Features
High Performance, Low Power Atmel
Advanced RISC Architecture
– 130 Powerful Instructions – Most Single Clock Cycle Execution
– 32 x 8 General Purpose Working Registers
– Fully Static Operation
– Up to 16 MIPS Throughput at 16MHz
– On-Chip 2-cycle Multiplier
High Endurance Non-volatile Memory Segments
– In-System Self-programmable Flash Program Memory
• 32KBytes (ATmega329/ATmega3290)
• 64KBytes (ATmega649/ATmega6490)
– EEPROM
• 1Kbytes (ATmega329/ATmega3290)
• 2Kbytes (ATmega649/ATmega6490)
– Internal SRAM
• 2Kbytes (ATmega329/ATmega3290)
• 4Kbytes (ATmega649/ATmega6490)
– Write/Erase Cycles: 10,000 Flash/ 100,000 EEPROM
– Data retention: 20 years at 85°C/100 years at 25°C
– Optional Boot Code Section with Independent Lock Bits
• In-System Programming by On-chip Boot Program
• True Read-While-Write Operation
– Programming Lock for Software Security
JTAG (IEEE std. 1149.1 compliant) Interface
– Boundary-scan Capabilities According to the JTAG Standard
– Extensive On-chip Debug Support
– Programming of Flash, EEPROM, Fuses, and Lock Bits through the JTAG Interface
Peripheral Features
– 4 x 25 Segment LCD Driver (ATmega329/ATmega649)
– 4 x 40 Segment LCD Driver (ATmega3290/ATmega6490)
– Two 8-bit Timer/Counters with Separate Prescaler and Compare Mode
– One 16-bit Timer/Counter with Separate Prescaler, Compare Mode, and Capture
Mode
– Real Time Counter with Separate Oscillator
– Four PWM Channels
– 8-channel, 10-bit ADC
– Programmable Serial USART
– Master/Slave SPI Serial Interface
– Universal Serial Interface with Start Condition Detector
– Programmable Watchdog Timer with Separate On-chip Oscillator
– On-chip Analog Comparator
– Interrupt and Wake-up on Pin Change
Special Microcontroller Features
– Power-on Reset and Programmable Brown-out Detection
– Internal Calibrated Oscillator
– External and Internal Interrupt Sources
– Five Sleep Modes: Idle, ADC Noise Reduction, Power-save, Power-down, and
Standby
I/O and Packages
– 53/68 Programmable I/O Lines
– 64-lead TQFP, 64-pad QFN/MLF, and 100-lead TQFP
Speed Grade:
– ATmega329V/ATmega3290V/ATmega649V/ATmega6490V:
– 0 - 4MHz @ 1.8 - 5.5V, 0 - 8MHz @ 2.7 - 5.5V
– ATmega329/3290/649/6490:
– 0 - 8MHz @ 2.7 - 5.5V, 0 - 16MHz @ 4.5 - 5.5V
Temperature range:
– -40°C to 85°C Industrial
Ultra-Low Power Consumption
– Active Mode:
• 1MHz, 1.8V: 350µA
• 32kHz, 1.8V: 20µA (including Oscillator)
• 32kHz, 1.8V: 40µA (including Oscillator and LCD)
– Power-down Mode:
• 100nA at 1.8V
®
®
AVR
8-Bit Microcontroller
(1)
8-bit Atmel
Microcontroller
with In-System
Programmable
Flash
ATmega329/V
ATmega3290/V
ATmega649/V
ATmega6490/V
Summary
2552KS–AVR–04/11

ATmega329 Summary of contents

  • Page 1

    ... Programming of Flash, EEPROM, Fuses, and Lock Bits through the JTAG Interface • Peripheral Features – Segment LCD Driver (ATmega329/ATmega649) – Segment LCD Driver (ATmega3290/ATmega6490) – Two 8-bit Timer/Counters with Separate Prescaler and Compare Mode – One 16-bit Timer/Counter with Separate Prescaler, Compare Mode, and Capture Mode – ...

  • Page 2

    ... Pin Configurations Figure 1-1. Pinout ATmega3290/6490 1 LCDCAP 2 (RXD/PCINT0) PE0 3 (TXD/PCINT1) PE1 4 (XCK/AIN0/PCINT2) PE2 (AIN1/PCINT3) PE3 5 6 (USCK/SCL/PCINT4) PE4 7 (DI/SDA/PCINT5) PE5 8 (DO/PCINT6) PE6 9 (CLKO/PCINT7) PE7 VCC 10 11 GND 12 DNC 13 (PCINT24/SEG35) PJ0 14 (PCINT25/SEG34) PJ1 DNC 15 16 DNC 17 DNC 18 DNC 19 (SS/PCINT8) PB0 (SCK/PCINT9) PB1 20 21 ...

  • Page 3

    ... Figure 1-2. Pinout ATmega329/649 LCDCAP 1 (RXD/PCINT0) PE0 2 (TXD/PCINT1) PE1 3 (XCK/AIN0/PCINT2) PE2 4 (AIN1/PCINT3) PE3 5 (USCK/SCL/PCINT4) PE4 6 (DI/SDA/PCINT5) PE5 7 (DO/PCINT6) PE6 8 (CLKO/PCINT7) PE7 9 (SS/PCINT8) PB0 10 (SCK/PCINT9) PB1 11 (MOSI/PCINT10) PB2 12 (MISO/PCINT11) PB3 13 (OC0A/PCINT12) PB4 14 (OC1A/PCINT13) PB5 15 (OC1B/PCINT14) PB6 16 Note: 2552KS–AVR–04/11 INDEX CORNER ATmega329/649 The large center pad underneath the QFN/MLF packages is made of metal and internally con- nected to GND ...

  • Page 4

    ... Overview The ATmega329/3290/649/6490 is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC architec- ture. By executing powerful instructions in a single clock cycle, the ATmega329/3290/649/6490 achieves throughputs approaching 1 MIPS per MHz allowing the system designer to optimize power consumption versus processing speed. 2.1 Block Diagram Figure 2-1 ...

  • Page 5

    ... Self-Programmable Flash on a monolithic chip, the Atmel ATmega329/3290/649/6490 is a pow- erful microcontroller that provides a highly flexible and cost effective solution to many embedded control applications. The Atmel ATmega329/3290/649/6490 is supported with a full suite of program and system development tools including: C Compilers, Macro Assemblers, Program Debugger/Simulators, In-Circuit Emulators, and Evaluation kits. ...

  • Page 6

    ... As inputs, Port A pins that are externally pulled low will source current if the pull-up resistors are activated. The Port A pins are tri-stated when a reset condition becomes active, even if the clock is not running. Port A also serves the functions of various special features of the ATmega329/3290/649/6490 as listed on 2.3.4 Port B (PB7 ...

  • Page 7

    ... As inputs, Port C pins that are externally pulled low will source current if the pull-up resistors are activated. The Port C pins are tri-stated when a reset condition becomes active, even if the clock is not running. Port C also serves the functions of special features of the ATmega329/3290/649/6490 as listed on page 2 ...

  • Page 8

    ... As inputs, Port J pins that are externally pulled low will source current if the pull-up resistors are activated. The Port J pins are tri-stated when a reset condition becomes active, even if the clock is not running. Port J also serves the functions of various special features of the ATmega3290/6490 as listed on page 75. ...

  • Page 9

    ... I/O. Typically “LDS” and “STS” combined with “SBRS”, “SBRC”, “SBR”, and “CBR”. 2552KS–AVR–04/11 but increases the time until V LCD 1. ATmega329/3290/649/6490 ). A large capacitance reduces LCD reaches its target value. LCD Fig- ...

  • Page 10

    ... Reserved - (0xC9) Reserved - (0xC8) Reserved - (0xC7) UDR0 (0xC6) UBRR0H (0xC5) UBRR0L (0xC4) 2552KS–AVR–04/11 Registers with bold type only available in ATmega3290/6490. Bit 6 Bit 5 Bit 4 SEG338 SEG337 SEG336 SEG330 SEG329 SEG328 SEG322 SEG321 SEG320 SEG314 SEG313 SEG312 SEG306 SEG305 SEG304 ...

  • Page 11

    ... Timer/Counter1 Output Compare Register B High Timer/Counter1 Output Compare Register B Low Timer/Counter1 Output Compare Register A High Timer/Counter1 Output Compare Register A Low Timer/Counter1 Input Capture Register High Timer/Counter1 Input Capture Register Low Timer/Counter1 High ATmega329/3290/649/6490 Bit 3 Bit 2 Bit USBS0 UCSZ01 UCSZ00 UCPOL0 ...

  • Page 12

    ... OCDR6 OCDR5 OCDR4 ACBG ACO ACI - - - SPI Data Register WCOL - - SPE DORD MSTR General Purpose I/O Register General Purpose I/O Register - - - - - - Timer/Counter0 Output Compare A Timer/Counter0 ATmega329/3290/649/6490 Bit 3 Bit 2 Bit WGM12 CS12 CS11 - - WGM11 - - AIN1D ADC3D ADC2D ADC1D - - - MUX3 MUX2 MUX1 - ADTS2 ...

  • Page 13

    ... Registers as data space using LD and ST instructions, 0x20 must be added to these addresses. The ATmega329/3290/649/6490 is a complex microcontroller with more peripheral units than can be supported within the 64 location reserved in Opcode for the IN and OUT instructions. For the Extended I/O space from 0x60 - 0xFF in SRAM, only the ST/STS/STD and LD/LDS/LDD instructions can be used. 2552KS– ...

  • Page 14

    ... Branch if Half Carry Flag Set BRHC k Branch if Half Carry Flag Cleared BRTS k Branch if T Flag Set 2552KS–AVR–04/11 ATmega329/3290/649/6490 Description Rd ← ← Rdh:Rdl ← Rdh:Rdl + K Rd ← ← ← ← Rdh:Rdl ← Rdh:Rdl - K Rd ← ...

  • Page 15

    ... Load Program Memory LPM Rd, Z+ Load Program Memory and Post-Inc SPM Store Program Memory 2552KS–AVR–04/11 ATmega329/3290/649/6490 Description then PC ← then PC ← then PC ← then PC ← then PC ← I/O(P,b) ← ...

  • Page 16

    ... MCU CONTROL INSTRUCTIONS NOP No Operation SLEEP Sleep WDR Watchdog Reset BREAK Break 2552KS–AVR–04/11 ATmega329/3290/649/6490 Description Rd ← ← Rr STACK ← ← STACK (see specific descr. for Sleep function) (see specific descr. for WDR/timer) For On-chip Debug Only Operation ...

  • Page 17

    ... Lead Pitch, Thin Profile Plastic Quad Flat Package (TQFP) 2552KS–AVR–04/11 ATmega329/3290/649/6490 (2) Ordering Code Package Type ATmega329V-8AU 64A (4) ATmega329V-8AUR 64A ATmega329V-8MU 64M1 (4) ATmega329V-8MUR 64M1 ATmega329-16AU 64A (4) ATmega329-16AUR 64A ATmega329-16MU 64M1 (4) ATmega329-16MUR 64M1 and Figure 28-2 on page 328. Package Type (1) Operational Range Industrial 0° ...

  • Page 18

    ... Lead Pitch, Thin Profile Plastic Quad Flat Package (TQFP) 2552KS–AVR–04/11 ATmega329/3290/649/6490 (2) Ordering Code Package Type ATmega3290V-8AU 100A (4) ATmega3290V-8AUR 100A ATmega3290-16AU 100A (4) ATmega3290-16AUR 100A and Figure 28-2 on page 328. Package Type (1) Operational Range Industrial 0°C to 85°C) ...

  • Page 19

    ... Thin Profile Plastic Quad Flat Package (TQFP) 64M1 64-pad 1.0 mm, Quad Flat No-Lead/Micro Lead Frame Package (QFN/MLF) 100A 100-lead 1.0 mm, 0.5 mm Lead Pitch, Thin Profile Plastic Quad Flat Package (TQFP) 2552KS–AVR–04/11 ATmega329/3290/649/6490 (2) Ordering Code Package Type ATmega649V-8AU 64A ...

  • Page 20

    ... Thin Profile Plastic Quad Flat Package (TQFP) 64M1 64-pad 1.0 mm, Quad Flat No-Lead/Micro Lead Frame Package (QFN/MLF) 100A 100-lead 1.0 mm, 0.5 mm Lead Pitch, Thin Profile Plastic Quad Flat Package (TQFP) 2552KS–AVR–04/11 ATmega329/3290/649/6490 (2) Ordering Code Package Type ATmega6490V-8AU 100A ...

  • Page 21

    ... San Jose, CA 95131 R 2552KS–AVR–04/11 B PIN 1 IDENTIFIER TITLE 64A, 64-lead Body Size, 1.0 mm Body Thickness, 0.8 mm Lead Pitch, Thin Profile Plastic Quad Flat Package (TQFP) ATmega329/3290/649/6490 A COMMON DIMENSIONS (Unit of Measure = mm) MIN MAX SYMBOL NOM A – – 1.20 A1 0.05 – ...

  • Page 22

    ... Pin #1 1 Option A Triangle 2 3 Option B Pin #1 Chamfer (C 0.30) Option C Pin #1 Notch e (0.20 R) TITLE 64M1, 64-pad 1.0 mm Body, Lead Pitch 0.50 mm, 5.40 mm Exposed Pad, Micro Lead Frame Package (MLF) ATmega329/3290/649/6490 C SEATING PLANE A1 A 0.08 C SIDE VIEW COMMON DIMENSIONS (Unit of Measure = mm) MIN MAX SYMBOL NOM A 0.80 0.90 1.00 A1 – ...

  • Page 23

    ... San Jose, CA 95131 R 2552KS–AVR–04/11 B PIN 1 IDENTIFIER TITLE 100A, 100-lead Body Size, 1.0 mm Body Thickness, 0.5 mm Lead Pitch, Thin Profile Plastic Quad Flat Package (TQFP) ATmega329/3290/649/6490 A COMMON DIMENSIONS (Unit of Measure = mm) MIN MAX SYMBOL NOM A – – 1.20 A1 0.05 – ...

  • Page 24

    ... Timer Control Register (TCCRx), asynchronous Timer Counter Register (TCNTx), or asynchronous Output Compare Register (OCRx). 10.1.2 ATmega329 rev. B Not sampled. 10.1.3 ATmega329 rev. A • LCD contrast voltage too high • Interrupts may be lost when writing the timer registers in the asynchronous timer 1. LCD contrast voltage too high When the LCD is active and using low power waveform, the LCD contrast voltage can be too high ...

  • Page 25

    ... Timer Control Register (TCCRx), asynchronous Timer Counter Register (TCNTx), or asynchronous Output Compare Register (OCRx). 10.2.2 ATmega3290 rev. B Not sampled. 10.2.3 ATmega3290 rev. A • LCD contrast voltage too high • Interrupts may be lost when writing the timer registers in the asynchronous timer 1. LCD contrast voltage too high When the LCD is active and using low power waveform, the LCD contrast voltage can be too high ...

  • Page 26

    ... Timer/Counter register (TCNTx) is 0x00. Problem Fix/Wortkaround Always check that the asynchronous Timer/Counter register neither have the value 0xFF nor 0x00 before writing to the asynchronous Timer Control Register (TCCRx), asynchronous Timer Counter Register (TCNTx), or asynchronous Output Compare Register (OCRx). 2552KS–AVR–04/11 ATmega329/3290/649/6490 26 ...

  • Page 27

    ... Reset Characteristics” on page Moved Register Descriptions to the end of each chapter. Updated date in backpage Updated column in Table 28-5 on page Updated Table 28-7 on page 333. Updated note in Table 28-7 on page 333 ATmega329/3290/649/6490 . . to include “Tape & Reel” devices. 309. 328. 330. 330. and Table 28-2 on page 329 ...

  • Page 28

    ... Updated Features in “Analog to Digital Converter” on page Updated “Prescaling and Conversion Timing” on page Updated features in “LCD Controller” on page Updated “ATmega329/3290/649/6490 Boot Loader Parameters” on page 290. Updated “DC Characteristics” on page Updated “” on page 334. ATmega329/3290/649/6490 Table 14-4 on page ...

  • Page 29

    ... Added Figure 27-12 on page 312. Updated Figure 22-9 on page 219 Updated algorithm “Enter Programming Mode” on page Added “Supply Current of I/O modules” on page Updated “Ordering Information” on page Initial version. ATmega329/3290/649/6490 54. Table 23-7 on page 243 and Table 27-15 and Figure 27-5 on page 304. 299. 340. 372. 29 ...

  • Page 30

    ... Atmel Munich GmbH Business Campus Parkring 4 D-85748 Garching b. Munich GERMANY Tel: (+49) 89-31970-0 Fax: (+49) 89-3194621 ® and others are registered trademarks or trademarks of Atmel Corporation or its Atmel Japan 9F, Tonetsu Shinkawa Bldg. 1-24-8 Shinkawa Chuo-ku, Tokyo 104-0033 JAPAN Tel: (+81)(3) 3523-3551 Fax: (+81)(3) 3523-7581 2552KS–AVR–04/11 ...