ATmega32M1 Atmel Corporation, ATmega32M1 Datasheet - Page 323

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ATmega32M1

Manufacturer Part Number
ATmega32M1
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATmega32M1

Flash (kbytes)
32 Kbytes
Pin Count
32
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
12
Hardware Qtouch Acquisition
No
Max I/o Pins
27
Ext Interrupts
27
Usb Speed
No
Usb Interface
No
Spi
1
Uart
1
Can
1
Lin
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
11
Adc Resolution (bits)
10
Adc Speed (ksps)
125
Analog Comparators
4
Resistive Touch Screen
No
Dac Channels
1
Dac Resolution (bits)
10
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
2
Eeprom (bytes)
1024
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
14
Input Capture Channels
1
Pwm Channels
10
32khz Rtc
No
Calibrated Rc Oscillator
Yes

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Note:
8209D–AVR–11/10
0x0D (0x2D)
0x0C (0x2C)
0x1B (0x3B)
0x1A (0x3A)
0x0E (0x2E)
0x0B (0x2B)
0x0A (0x2A)
0x19 (0x39)
0x18 (0x38)
0x17 (0x37)
0x16 (0x36)
0x15 (0x35)
0x14 (0x34)
0x13 (0x33)
0x12 (0x32)
0x11 (0x31)
0x10 (0x30)
0x0F (0x2F)
0x09 (0x29)
0x08 (0x28)
0x07 (0x27)
0x06 (0x26)
0x05 (0x25)
0x04 (0x24)
0x03 (0x23)
0x02 (0x22)
0x01 (0x21)
0x00 (0x20)
Address
1. For compatibility with future devices, reserved bits should be written to zero if accessed. Reserved I/O memory addresses
2. I/O Registers within the address range 0x00 - 0x1F are directly bit-accessible using the SBI and CBI instructions. In these
3. Some of the status flags are cleared by writing a logical one to them. Note that, unlike most other AVRs, the CBI and SBI
4. When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O
5. These registers are only available on ATmega32/64M1. For other products described in this datasheet, these locations are
should never be written
registers, the value of single bits can be checked by using the SBIS and SBIC instructions
instructions will only operate on the specified bit, and can therefore be used on registers containing such status flags. The
CBI and SBI instructions work with registers 0x00 to 0x1F only
Registers as data space using LD and ST instructions, 0x20 must be added to these addresses. The
ATmega16M1/32M1/64M1 is a complex microcontroller with more peripheral units than can be supported within the 64 loca-
tion reserved in Opcode for the IN and OUT instructions. For the Extended I/O space from 0x60 - 0xFF in SRAM, only the
ST/STS/STD and LD/LDS/LDD instructions can be used
reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
GPIOR2
GPIOR1
PORTD
PORTC
PORTB
PORTE
Name
PCIFR
DDRD
DDRC
DDRB
TIFR1
TIFR0
DDRE
PINE
PIND
PINC
PINB
GPIOR27
GPIOR17
PORTD7
PORTC7
PORTB7
PIND7
PINC7
PINB7
DDD7
DDC7
DDB7
Bit 7
GPIOR26
GPIOR16
PORTD6
PORTC6
PORTB6
PIND6
PINC6
PINB6
DDD6
DDC6
DDB6
Bit 6
GPIOR25
GPIOR15
PORTD5
PORTC5
PORTB5
PIND5
PINC5
PINB5
DDD5
DDC5
DDB5
Bit 5
ICF1
GPIOR24
GPIOR14
PORTD4
PORTC4
PORTB4
PIND4
PINC4
PINB4
DDD4
DDC4
DDB4
Bit 4
GPIOR23
GPIOR13
PORTD3
PORTC3
PORTB3
PCIF3
PIND3
PINC3
PINB3
DDD3
DDC3
DDB3
Bit 3
ATmega16M1/32M1/64M1
GPIOR22
GPIOR12
PORTE2
PORTD2
PORTC2
PORTB2
OCF1B
OCF0B
PIND2
PINC2
PCIF2
PINE2
PINB2
DDE2
DDD2
DDC2
DDB2
Bit 2
GPIOR21
GPIOR11
PORTE1
PORTD1
PORTC1
PORTB1
OCF1A
OCF0A
PCIF1
PINE1
PIND1
PINC1
PINB1
DDE1
DDD1
DDC1
DDB1
Bit 1
GPIOR20
GPIOR10
PORTD0
PORTC0
PORTE0
PORTB0
PINE0
PIND0
PINC0
PINB0
PCIF0
DDE0
DDD0
DDC0
DDB0
Bit 0
TOV1
TOV0
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