ATmega32U4 Atmel Corporation, ATmega32U4 Datasheet - Page 330

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ATmega32U4

Manufacturer Part Number
ATmega32U4
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATmega32U4

Flash (kbytes)
32 Kbytes
Pin Count
44
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
14
Hardware Qtouch Acquisition
No
Max I/o Pins
26
Ext Interrupts
13
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
2
Twi (i2c)
1
Uart
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
12
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
3.3
Eeprom (bytes)
1024
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
4
Output Compare Channels
12
Input Capture Channels
2
Pwm Channels
8
32khz Rtc
No
Calibrated Rc Oscillator
Yes

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27. Boot Loader Support – Read-While-Write Self-Programming
27.1
27.2
27.2.1
27.2.2
27.3
7766F–AVR–11/10
Boot Loader Features
Application and Boot Loader Flash Sections
Read-While-Write and No Read-While-Write Flash Sections
Application Section
BLS – Boot Loader Section
The Boot Loader Support provides a real Read-While-Write Self-Programming mechanism for
downloading and uploading program code by the MCU itself. This feature allows flexible applica-
tion software updates controlled by the MCU using a Flash-resident Boot Loader program. The
Boot Loader program can use any available data interface and associated protocol to read code
and write (program) that code into the Flash memory, or read the code from the program mem-
ory. The program code within the Boot Loader section has the capability to write into the entire
Flash, including the Boot Loader memory. The Boot Loader can thus even modify itself, and it
can also erase itself from the code if the feature is not needed anymore. The size of the Boot
Loader memory is configurable with fuses and the Boot Loader has two separate sets of Boot
Lock bits which can be set independently. This gives the user a unique flexibility to select differ-
ent levels of protection. General information on SPM and ELPM is provided in
Core” on page 9.
Note:
The Flash memory is organized in two main sections, the Application section and the Boot
Loader section (see
BOOTSZ Fuses as shown in
have different level of protection since they have different sets of Lock bits.
The Application section is the section of the Flash that is used for storing the application code.
The protection level for the Application section can be selected by the application Boot Lock bits
(Boot Lock bits 0), see
Boot Loader code since the SPM instruction is disabled when executed from the Application
section.
While the Application section is used for storing the application code, the The Boot Loader soft-
ware must be located in the BLS since the SPM instruction can initiate a programming when
executing from the BLS only. The SPM instruction can access the entire Flash, including the
BLS itself. The protection level for the Boot Loader section can be selected by the Boot Loader
Lock bits (Boot Lock bits 1), see
Whether the CPU supports Read-While-Write or if the CPU is halted during a Boot Loader soft-
ware update is dependent on which address that is being programmed. In addition to the two
Read-While-Write Self-Programming
Flexible Boot Memory Size
High Security (Separate Boot Lock Bits for a Flexible Protection)
Separate Fuse to Select Reset Vector
Optimized Page
Code Efficient Algorithm
Efficient Read-Modify-Write Support
1. A page is a section in the Flash consisting of several bytes (see
used during programming. The page organization does not affect normal operation.
(1)
Size
Figure
Table 27-2 on page
Table 27-8 on page 344
27-2). The size of the different sections is configured by the
Table 27-3 on page
334. The Application section can never store any
334.
and
Figure
ATmega16/32U4
27-2. These two sections can
Table 28-11 on page
See “AVR CPU
351)
330

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