ATmega644PR231 Atmel Corporation, ATmega644PR231 Datasheet - Page 38

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ATmega644PR231

Manufacturer Part Number
ATmega644PR231
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATmega644PR231

Flash (kbytes)
64 Kbytes
Max. Operating Frequency
20 MHz
Max I/o Pins
32
Spi
3
Twi (i2c)
1
Uart
2
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Crypto Engine
AES
Sram (kbytes)
4
Eeprom (bytes)
2048
Operating Voltage (vcc)
1.8 to 3.6
Timers
3
Frequency Band
2.4 GHz
Max Data Rate (mb/s)
2
Antenna Diversity
Yes
External Pa Control
Yes
Power Output (dbm)
3
Receiver Sensitivity (dbm)
-101
Receive Current Consumption (ma)
13.2
Transmit Current Consumption (ma)
14.4
Link Budget (dbm)
104
6.9
6.10
6.11
8011O–AVR–07/10
Timer/Counter Oscillator
Clock Output Buffer
System Clock Prescaler
Table 6-15.
When applying an external clock, it is required to avoid sudden changes in the applied clock fre-
quency to ensure stable operation of the MCU. A variation in frequency of more than 2% from
one clock cycle to the next can lead to unpredictable behavior. If changes of more than 2% is
required, ensure that the MCU is kept in Reset during the changes.
Note that the System Clock Prescaler can be used to implement run-time changes of the internal
clock frequency while still ensuring stable operation. Refer to
38
ATmega164P/324P/644P uses the same type of crystal oscillator for Low-frequency Crystal
Oscillator and Timer/Counter Oscillator. See
details on the oscillator and crystal requirements.
The device can operate its Timer/Counter2 from an external 32.768 kHz watch crystal or a exter-
nal clock source. See
Applying an external clock source to TOSC1 can be done if EXTCLK in the ASSR Register is
written to logic one. See
uously compared with the counter value (TCNT2). A match can be used to generate an Output
Compare interrupt, or to generate a waveform output on the OC2B pin.” on page 157
description on selecting external clock as input instead of a 32.768 kHz watch crystal.
The device can output the system clock on the CLKO pin. To enable the output, the CKOUT
Fuse has to be programmed. This mode is suitable when the chip clock is used to drive other cir-
cuits on the system. The clock also will be output during reset, and the normal operation of I/O
pin will be overridden when the fuse is programmed. Any clock source, including the internal RC
Oscillator, can be selected when the clock is output on CLKO. If the System Clock Prescaler is
used, it is the divided system clock that is output.
The ATmega164P/324P/644P has a system clock prescaler, and the system clock can be
divided by setting the
to decrease the system clock frequency and the power consumption when the requirement for
processing power is low. This can be used with all clock source options, and it will affect the
clock frequency of the CPU and all synchronous peripherals. clk
are divided by a factor as shown in
When switching between prescaler settings, the System Clock Prescaler ensures that no
glitches occurs in the clock system. It also ensures that no intermediate frequency is higher than
BOD enabled
Fast rising power
Slowly rising power
for details.
Power Conditions
Start-up Times for the External Clock Selection
”CLKPR – Clock Prescale Register” on page
”Clock Source Connections” on page 31
”The Output Compare Register B contains an 8-bit value that is contin-
Start-up Time from Power-
down and Power-save
Table 6-16 on page
Reserved
6 CK
6 CK
6 CK
”Low Frequency Crystal Oscillator” on page 34
ATmega164P/324P/644P
41.
Additional Delay from
”System Clock Prescaler” on page
Reset (V
for details.
14CK + 4.1 ms
14CK + 65 ms
I/O
40. This feature can be used
, clk
14CK
CC
ADC
= 5.0V)
, clk
CPU
, and clk
for further
SUT1..0
00
01
10
11
FLASH
for
38

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