ATmega64M1 Atmel Corporation, ATmega64M1 Datasheet - Page 240

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ATmega64M1

Manufacturer Part Number
ATmega64M1
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATmega64M1

Flash (kbytes)
64 Kbytes
Pin Count
32
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
12
Hardware Qtouch Acquisition
No
Max I/o Pins
27
Ext Interrupts
27
Usb Speed
No
Usb Interface
No
Spi
1
Uart
1
Can
1
Lin
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
11
Adc Resolution (bits)
10
Adc Speed (ksps)
125
Analog Comparators
4
Resistive Touch Screen
No
Dac Channels
1
Dac Resolution (bits)
10
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
4
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
14
Input Capture Channels
1
Pwm Channels
10
32khz Rtc
No
Calibrated Rc Oscillator
Yes

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240
ATmega16M1/32M1/64M1
Figure 21-17. Amplifier synchronization timing diagram
In order to have a better understanding of the functioning of the amplifier synchronization, a tim-
ing diagram example is shown
It is also possible to auto trigger conversion on the amplified channel. In this case, the conver-
sion is started at the next amplifier clock event following the last auto trigger event selected
thanks to the ADTS bits in the ADCSRB register. In auto trigger conversion, the free running
mode is not possible unless the ADSC bit in ADCSRA is set by soft after each conversion.
The block diagram of the two amplifiers is shown on
Block
ADC
PSC
(Sync Clock)
Si g nal to be
PS Cn_ASY
AMPLI_clk
measu red
CK ADC
Activity
ADSC
ADC
ADSC is set when the amplifier output is changing due to the amplifier clock
switch
Figure 21-15 on page
Sampling
ADC
Conv
ADC
ADC Result
Ready
Figure 21-18 on page
236.
Sampling
Aborted
ADC
241.
Sampling
ADC
8209D–AVR–11/10
Valid sample
Conv
ADC
ADC Result
Ready

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