ATtiny24A Atmel Corporation, ATtiny24A Datasheet - Page 83

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ATtiny24A

Manufacturer Part Number
ATtiny24A
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATtiny24A

Flash (kbytes)
2 Kbytes
Pin Count
14
Max. Operating Frequency
20 MHz
Cpu
8-bit AVR
# Of Touch Channels
4
Hardware Qtouch Acquisition
No
Max I/o Pins
12
Ext Interrupts
12
Usb Speed
No
Usb Interface
No
Spi
1
Twi (i2c)
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
0.12
Eeprom (bytes)
128
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
4
Input Capture Channels
1
Pwm Channels
4
32khz Rtc
No
Calibrated Rc Oscillator
Yes

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11.9.3
11.9.4
11.9.5
11.9.6
8183D–AVR–04/11
TCNT0 – Timer/Counter Register
OCR0A – Output Compare Register A
OCR0B – Output Compare Register B
TIMSK0 – Timer/Counter 0 Interrupt Mask Register
Table 11-9.
If external pin modes are used for the Timer/Counter0, transitions on the T0 pin will clock the
counter even if the pin is configured as an output. This feature allows software control of the
counting.
The Timer/Counter Register gives direct access, both for read and write operations, to the
Timer/Counter unit 8-bit counter. Writing to the TCNT0 Register blocks (removes) the Compare
Match on the following timer clock. Modifying the counter (TCNT0) while the counter is running,
introduces a risk of missing a Compare Match between TCNT0 and the OCR0x Registers.
The Output Compare Register A contains an 8-bit value that is continuously compared with the
counter value (TCNT0). A match can be used to generate an Output Compare interrupt, or to
generate a waveform output on the OC0A pin.
The Output Compare Register B contains an 8-bit value that is continuously compared with the
counter value (TCNT0). A match can be used to generate an Output Compare interrupt, or to
generate a waveform output on the OC0B pin.
• Bits 7:3 – Res: Reserved Bits
These bits are reserved bits in the ATtiny24A/44A/84A and will always read as zero.
Bit
0x32 (0x52)
Read/Write
Initial Value
Bit
0x36 (0x56)
Read/Write
Initial Value
Bit
0x3C (0x5C)
Read/Write
Initial Value
Bit
0x39 (0x59)
Read/Write
Initial Value
CS02
1
1
1
1
CS01
0
0
1
1
Clock Select Bit Description (Continued)
R/W
R/W
R/W
R
7
0
7
0
7
0
7
0
CS00
0
1
0
1
R/W
R/W
R/W
R
6
0
6
0
6
0
6
0
Description
clk
clk
External clock source on T0 pin. Clock on falling edge.
External clock source on T0 pin. Clock on rising edge.
I/O
I/O
/256 (From prescaler)
/1024 (From prescaler)
R/W
R/W
R/W
R
5
0
5
0
5
0
5
0
R/W
R/W
R/W
R
4
0
4
0
4
0
4
0
OCR0A[7:0]
OCR0B[7:0]
TCNT0[7:0]
R/W
R/W
R/W
R
3
0
3
0
3
0
3
0
ATtiny24A/44A/84A
OCIE0B
R/W
R/W
R/W
R/W
2
0
2
0
2
0
2
0
OCIE0A
R/W
R/W
R/W
R/W
1
0
1
0
1
0
1
0
TOIE0
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0
TIMSK0
OCR0A
OCR0B
TCNT0
83

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