ATUC128D3 Atmel Corporation, ATUC128D3 Datasheet - Page 284

• Manufacturer Part Number: ATUC128D3
• Manufacturer: Atmel Corporation

Specifications of ATUC128D3

• Flash (kbytes): 128 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 48 MHz
• Cpu: 32-bit AVR
• # Of Touch Channels: 25
• Hardware Qtouch Acquisition: Yes
• Max I/o Pins: 51
• Ext Interrupts: 51
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 1
• Twi (i2c): 2
• Uart: 3
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 16
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.0 to 3.6
• Operating Voltage (vcc): 3.0 to 3.6
• Fpu: No
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 7
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

284
AVR32
PREF – Cache Prefetch
Architecture revision:
Architecture revision1 and higher.
Description
This instruction allows the programmer to explicitly state that the cache should prefetch the
specified line. The memory system treats this instruction in an implementation-dependent man-
ner, and implementations without cache treats the instruction as a NOP. A prefetch instruction
never reduces the performance of the system. If the prefetch instruction performs an action that
would lower the system performance, it is treated as a NOP. For example, if the prefetch instruc-
tion is about to generate an addressing exception, the instruction is cancelled and no exception
is taken.
Operation:
I.
Syntax:
Operands:
I.
Status Flags:
Opcode:
31
1
15
Prefetch cache line containing the address (Rp + SE(disp16)).
pref
p ∈ {0, 1, …, 15}
disp ∈ {-32768, -32767, ..., 32767}
Q:
V:
N:
Z:
C:
1
29
1
Rp[disp]
Not affected.
Not affected.
Not affected.
Not affected.
Not affected.
28
1
0
0
1
0
disp16
0
0
0
20
1
19
Rp
32000D–04/2011
0
16