ATUC64L4U Atmel Corporation, ATUC64L4U Datasheet - Page 288

no-image

ATUC64L4U

Manufacturer Part Number
ATUC64L4U
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATUC64L4U

Flash (kbytes)
64 Kbytes
Pin Count
48
Max. Operating Frequency
50 MHz
Cpu
32-bit AVR
# Of Touch Channels
17
Hardware Qtouch Acquisition
Yes
Max I/o Pins
36
Ext Interrupts
36
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
1
Twi (i2c)
2
Uart
4
Lin
4
Ssc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
12
Adc Speed (ksps)
460
Analog Comparators
8
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
16
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.62 to 3.6
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
18
Input Capture Channels
12
Pwm Channels
35
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATUC64L4U-AUR
Manufacturer:
Atmel
Quantity:
10 000
Part Number:
ATUC64L4U-AUT
Manufacturer:
Atmel
Quantity:
10 000
Part Number:
ATUC64L4U-D3HR
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Part Number:
ATUC64L4U-H
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Part Number:
ATUC64L4U-U
Manufacturer:
ATMEL
Quantity:
20
Part Number:
ATUC64L4U-ZUT
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
288
AVR32
PSUBADDH.SH – Packed Signed Halfword Subtraction and Addition with
Halving
Architecture revision:
Architecture revision1 and higher.
Description
Perform a subtraction and addition on the same halfword operands which are selected from the
source registers. The halfword results are halved in order to prevent any overflows from occuring
Operation:
I.
Syntax:
I.
Operands:
I.
Status Flags:
Opcode:
31
1
15
0
If (Rx-part == t) then operand1 = Rx[31:16] else operand1 = Rx[15:0];
If (Ry-part == t) then operand2 = Ry[31:16] else operand2 = Ry[15:0];
Rd[31:16] ← ASR(SE(operand1, 17) - SE(operand2, 17), 1);
Rd[15:0] ← ASR(SE(operand1, 17) + SE(operand2, 17), 1);
psubaddh.sh
{d, x, y} ∈ {0, 1, …, 15}
part ∈ {t,b}
Q:
V:
N:
Z:
C:
Format I:
1
0
29
1
1
Not affected.
Not affected.
Not affected.
Not affected.
Not affected.
28
0
Rd, Rx:<part>, Ry:<part>
0
Rx
0
25
1
24
0
0
0
1
6
1
0
5
0
X
4
20
0
Y
3
19
Ry
Rd
32000D–04/2011
0
16

Related parts for ATUC64L4U