ATxmega32D4 Atmel Corporation, ATxmega32D4 Datasheet - Page 11

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ATxmega32D4

Manufacturer Part Number
ATxmega32D4
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATxmega32D4

Flash (kbytes)
32 Kbytes
Pin Count
44
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
34
Ext Interrupts
34
Usb Speed
No
Usb Interface
No
Spi
4
Twi (i2c)
2
Uart
2
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
12
Adc Resolution (bits)
12
Adc Speed (ksps)
200
Analog Comparators
2
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
4
Eeprom (bytes)
1024
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
4
Output Compare Channels
14
Input Capture Channels
14
Pwm Channels
14
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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3.10
3.10.1
3.10.2
3.10.3
8210B–AVR–04/10
RAMP and Extended Indirect Registers
RAMPX, RAMPY and RAMPZ Registers
RAMPD Register
EIND - Extended Indirect Register
In order to access program memory or data memory above 64K bytes, the address or address
pointer must be more than 16-bits. This is done by concatenating one register to one of the X-,
Y- or Z-registers, and this register then holds the most significant byte (MSB) in a 24-bit address
or address pointer.
These registers are only available on devices with external bus interface and/or more than 64K
bytes of program or data memory space. For these devices, only the number of bits required to
address the whole program and data memory space in the device is implemented in the
registers.
The RAMPX, RAMPY and RAMPZ registers are concatenated with the X-, Y-, and Z-registers
respectively to enable indirect addressing of the whole data memory space above 64K bytes
and up to 16M bytes.
Figure 3-6.
When reading (ELPM) and writing (SPM) program memory locations above the first 128K bytes
of the program memory, RAMPZ is concatenated with the Z-register to form the 24-bit address.
LPM is not affected by the RAMPZ setting.
This register is concatenated with the operand to enable direct addressing of the whole data
memory space above 64K bytes. Together RAMPD and the operand will form a 24-bit address.
Figure 3-7.
EIND is concatenated with the Z-register to enable indirect jump and call to locations above the
first 128K bytes (64K words) of the program memory.
Figure 3-8.
Bit (Individually)
Bit (X-pointer)
Bit (Individually)
Bit (Y-pointer)
Bit (Individually)
Bit (Z-pointer)
Bit (Individually)
Bit (D-pointer)
Bit (Individually)
Bit (D-pointer)
The combined RAMPX + X, RAMPY + Y and RAMPZ + Z registers
The combined RAMPD + K register
The combined EIND + Z register
23
23
23
23
7
23
7
7
7
7
RAMPD
RAMPX
RAMPY
RAMPZ
EIND
16
0
16
0
16
16
16
0
0
0
15
15
15
7
15
15
15
7
7
7
ZH
XH
YH
ZH
0
8
0
8
0
8
0
8
K
7
7
7
7
7
7
7
7
XMEGA D
ZL
XL
YL
ZL
0
0
0
0
0
0
0
0
0
0
11

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