M55800A Atmel Corporation, M55800A Datasheet - Page 89

• Manufacturer Part Number: M55800A
• Manufacturer: Atmel Corporation

Specifications of M55800A

• Flash (kbytes): 0 Kbytes
• Pin Count: 176
• Max. Operating Frequency: 33 MHz
• Cpu: ARM7TDMI
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 58
• Ext Interrupts: 58
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Uart: 3
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 72
• Resistive Touch Screen: No
• Dac Channels: 1
• Dac Resolution (bits): 10
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 8
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.3/5.0
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

Memory Interface
nENOUT
PAD
DOUT[31:0]
XDATA[31:0]
ARM7TDMI
DIN[31:0]
Figure 3-14 External connection of unidirectional buses
Bidirectional data bus
When BUSEN is LOW, the buffer between DIN[31:0] and D[31:0] is disabled. Any
data presented on DIN[31:0] is ignored. Also, when BUSEN is LOW, the value on
DOUT[31:0] is forced to
.
When the ARM7TDMI processor is reading from memory DIN[31:0] is acting as an
input. During write cycles the ARM7TDMI core must output data. During phase 2 of
the previous cycle, the signal nRW is driven HIGH to indicate a write cycle. During the
actual cycle, nENOUT is driven LOW to indicate that the processor is driving D[31:0]
as an output. Figure 3-15 on page 3-20 shows the bus timing with the data bus enabled.
Figure 3-16 on page 3-20 shows the circuit that exists in the processor for controlling
exactly when the external bus is driven out.
ARM DDI 0029G
Copyright © 1994-2001. All rights reserved.
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