SAM7S32 Atmel Corporation, SAM7S32 Datasheet - Page 127

• Manufacturer Part Number: SAM7S32
• Manufacturer: Atmel Corporation

Specifications of SAM7S32

• Flash (kbytes): 32 Kbytes
• Pin Count: 48
• Max. Operating Frequency: 55 MHz
• Cpu: ARM7TDMI
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 21
• Ext Interrupts: 21
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Uart: 2
• Ssc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 384
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 8
• Self Program Memory: NO
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 3.0 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

5.2.3
ARM DDI 0029G
Debug target
The ARM7TDMI processor has hardware extensions that ease debugging at the lowest
level. The debug extensions:
•
•
•
•
The major blocks of the debug target are shown in Figure 5-2.
The ARM CPU core
The EmbeddedICE Logic
The TAP controller
allow you to halt program execution
examine and modify the core internal state of the core
view and modify the state of the memory system
resume program execution.
Copyright © 1994-2001. All rights reserved.
EmbeddedICE
This has hardware support for debug.
This is a set of registers and comparators used to generate debug
exceptions such as breakpoints. This unit is described in About
EmbeddedICE Logic on page 5-13.
This controls the action of the scan chains using a JTAG serial interface.
Scan chain 2
Logic
TAP controller
Scan chain 0
Scan chain 1
Figure 5-2 ARM7TDMI block diagram
Main processor
logic
Debug Interface
5-5