SAM7X128 Atmel Corporation, SAM7X128 Datasheet - Page 32

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SAM7X128

Manufacturer Part Number
SAM7X128
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM7X128

Flash (kbytes)
128 Kbytes
Pin Count
100
Max. Operating Frequency
55 MHz
Cpu
ARM7TDMI
Hardware Qtouch Acquisition
No
Max I/o Pins
62
Ext Interrupts
62
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
2
Twi (i2c)
1
Uart
3
Can
1
Ssc
1
Ethernet
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
32
Self Program Memory
NO
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.3
Operating Voltage (vcc)
3.0 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
Introduction
1.4
1.4.1
1-10
Instruction set summary
Format summary
Type
S
B
H
T
Addressing modes
This section provides a description of the instruction sets used on the ARM7TDMI
processor.
This section describes:
This section provides a summary of the ARM, and Thumb instruction sets:
A key to the instruction set tables is provided in Table 1-1.
The ARM7TDMI processor uses an implementation of the ARMv4T architecture. For
a complete description of both instruction sets, refer to the ARM Architecture Reference
Manual.
The ARM instruction set formats are shown in Figure 1-5 on page 1-11.
Format summary on page 1-10
ARM instruction summary on page 1-12
Thumb instruction summary on page 1-19.
ARM instruction summary on page 1-12
Thumb instruction summary on page 1-19.
Description
Condition field, see Table 1-6 on page 1-19.
Operand2, see Table 1-4 on page 1-18.
Control field, see Table 1-5 on page 1-18.
Sets condition codes, optional.
Byte operation, optional.
Halfword operation, optional.
Forces address translation. Cannot be used with pre-indexed addresses.
See Addressing modes on page 1-15.
A 32-bit constant, formed by right-rotating an 8-bit value by an even number of bits.
A comma-separated list of registers, enclosed in braces ( { and } ).
Copyright © 1994-2001. All rights reserved.
Table 1-1 Key to tables
ARM DDI 0029G

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