SAM7X256 Atmel Corporation, SAM7X256 Datasheet - Page 167

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SAM7X256

Manufacturer Part Number
SAM7X256
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM7X256

Flash (kbytes)
256 Kbytes
Pin Count
100
Max. Operating Frequency
55 MHz
Cpu
ARM7TDMI
Hardware Qtouch Acquisition
No
Max I/o Pins
62
Ext Interrupts
62
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
2
Twi (i2c)
1
Uart
3
Can
1
Ssc
1
Ethernet
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
64
Self Program Memory
NO
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.3
Operating Voltage (vcc)
3.0 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
6.16
ARM DDI 0029G
ready
not ready
Coprocessor register transfer, load from coprocessor
Cycle
1
2
3
-
1
2
b
b+1
b+2
Address
pc+8
pc+12
pc+12
pc+12
pc+8
pc+8
pc+8
pc+8
pc+12
pc+12
pc+12
The busy-wait cycles are similar to those described in Coprocessor data transfer from
memory to coprocessor on page 6-21, but the transfer is limited to one word, and the
ARM7TDMI core puts the data into the destination register in the third cycle. The third
cycle can be merged with the next prefetch cycle into one memory N-cycle as with all
processor register load instructions.
The cycle timings are listed in Table 6-19 where:
Coprocessor register transfer operations are not available in Thumb state.
b represents the busy cycles.
Note
MAS
[1:0]
2
2
2
2
2
2
2
2
2
Copyright © 1994-2001. All rights reserved.
Table 6-19 Coprocessor register transfer, load from coprocessor
nRW
0
0
0
0
0
0
0
0
0
Data
(pc+8)
CPdata
-
(pc+8)
-
-
-
CPdata
-
nMREQ
1
1
0
1
1
1
1
1
0
SEQ
1
0
1
0
0
0
1
0
1
nOPC
0
1
1
0
1
1
1
1
1
Instruction Cycle Timings
nCPI
0
1
1
0
0
0
0
1
1
CPA
0
1
-
0
0
0
0
1
-
CPB
0
1
-
1
1
1
0
1
-
6-25

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