SAM3N0A Atmel Corporation, SAM3N0A Datasheet - Page 548

• Manufacturer Part Number: SAM3N0A
• Manufacturer: Atmel Corporation

30.7.5.3
Figure 30-25. IrDA Demodulator Operations
11011A–ATARM–04-Oct-10
11011A–ATARM–04-Oct-10
Receiver
Counter
Value
Input
MCK
RXD
IrDA Demodulator
6
Rejected
5
Pulse
4
Table 30-13. IrDA Baud Rate Error (Continued)
The demodulator is based on the IrDA Receive filter comprised of an 8-bit down counter which is
loaded with the value programmed in US_IF. When a falling edge is detected on the RXD pin,
the Filter Counter starts counting down at the Master Clock (MCK) speed. If a rising edge is
detected on the RXD pin, the counter stops and is reloaded with US_IF. If no rising edge is
detected when the counter reaches 0, the input of the receiver is driven low during one bit time.
Figure 30-25
As the IrDA mode uses the same logic as the ISO7816, note that the FI_DI_RATIO field in
US_FIDI must be set to a value higher than 0 in order to assure IrDA communications operate
correctly.
Peripheral Clock
40 000 000
3 686 400
20 000 000
32 768 000
40 000 000
3 686 400
20 000 000
32 768 000
40 000 000
3 686 400
20 000 000
32 768 000
40 000 000
3 686 400
20 000 000
32 768 000
3
2
6
illustrates the operations of the IrDA demodulator.
6
5
Baud Rate
4
Accepted
Pulse
57 600
38 400
38 400
38 400
38 400
19 200
19 200
19 200
19 200
9 600
9 600
9 600
9 600
2 400
2 400
2 400
3
2
1
0
107
130
130
213
260
521
853
CD
43
33
53
65
12
65
24
96
6
Baud Rate Error
0.93%
0.00%
1.38%
0.63%
0.16%
0.00%
0.16%
0.31%
0.16%
0.00%
0.16%
0.16%
0.16%
0.00%
0.03%
0.04%
Pulse Time
SAM3N
SAM3N
19.53
19.53
19.53
19.53
78.13
78.13
78.13
3.26
4.88
4.88
4.88
4.88
9.77
9.77
9.77
9.77
548
548