SAM3S8C Atmel Corporation, SAM3S8C Datasheet - Page 300

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SAM3S8C

Manufacturer Part Number
SAM3S8C
Description
Manufacturer
Atmel Corporation
Datasheets
18.4
18.4.1
Figure 18-1. Embedded Flash Organization
300
300
Functional Description
SAM3S8/SD8
SAM3S8/SD8
Embedded Flash Organization
Start Address + Flash size -1
The embedded Flash interfaces directly with the 32-bit internal bus. The embedded Flash is
composed of:
The embedded Flash size, the page size, the lock regions organization and GPNVM bits defini-
tion are described in the product definition section. The Enhanced Embedded Flash Controller
(EEFC) returns a descriptor of the Flash controlled after a get descriptor command issued by the
application (see
• One memory plane organized in several pages of the same size.
• Two memory planes organized in several pages of the same size (only for SAM3SD8).
• Two 128-bit or 64-bit read buffers used for code read optimization.
• One 128-bit or 64-bit read buffer used for data read optimization.
• One write buffer that manages page programming. The write buffer size is equal to the page
• Several lock bits used to protect write/erase operation on several pages (lock region). A lock
• Several bits that may be set and cleared through the Enhanced Embedded Flash Controller
size. This buffer is write-only and accessible all along the 1 MByte address space, so that
each word can be written to its final address.
bit is associated with a lock region composed of several pages in the memory plane.
(EEFC) interface, called General Purpose Non Volatile Memory bits (GPNVM bits).
Start Address
“Getting Embedded Flash Descriptor” on page
Memory Plane
Page (n*m-1)
Page (m-1)
Page 0
Lock Region 0
Lock Region 1
Lock Region (n-1)
305).
Lock Bit 0
Lock Bit 1
Lock Bit (n-1)
11090A–ATARM–10-Feb-12
11090A–ATARM–10-Feb-12

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