AD5590 Analog Devices, AD5590 Datasheet
AD5590
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... Tel: 781.329.4700 Fax: 781.461.3113 with Integrated Amplifiers REFOUT1 POWER-DOWN LOGIC 2.5V REF BUFFER VOUT0 BUFFER VOUT7 BUFFER VOUT8 BUFFER VOUT15 POWER-DOWN LOGIC V /V REFIN2 REFOUT2 VIN0 INPUT T/H MUX VIN15 AD5590 V REFA ADCGND ©2008–2011 Analog Devices, Inc. All rights reserved. AD5590 www.analog.com ...
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... AD5590 TABLE OF CONTENTS Features .............................................................................................. 1 Applications ....................................................................................... 1 Functional Block Diagram .............................................................. 1 Revision History ............................................................................... 2 General Description ......................................................................... 3 Specifications ..................................................................................... 4 ADC Specifications ...................................................................... 4 DAC Specifications....................................................................... 6 Operational Amplifier Specifications ........................................ 8 Timing Specifications .................................................................. 9 Absolute Maximum Ratings .......................................................... 11 Thermal Resistance .................................................................... 11 ESD Caution ................................................................................ 11 Pin Configuration and Function Descriptions ........................... 12 Typical Performance Characteristics ........................................... 14 REVISION HISTORY 7/11—Rev Rev. A Changes to Features Section and Figure 1 ...
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... GENERAL DESCRIPTION The AD5590 is a 16-channel input and 16-channel output analog I/O port with eight uncommitted amplifiers, operating from a single 4 5.25 V supply. The AD5590 comprises 16 input channels multiplexed into a 1 MSPS, 12-bit successive approximation ADC with a sequencer to allow a preprogrammed selection of channels to be converted sequentially. The ADC contains a low noise, wide bandwidth track-and-hold amplifier that can handle input frequencies in excess of 1 MHz ...
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... AD5590 SPECIFICATIONS ADC SPECIFICATIONS ADCV = DRIVE REFA Table 1. Parameter DYNAMIC PERFORMANCE Signal-to-(Noise + Distortion) (SINAD) Signal-to-Noise Ratio (SNR) 3 Total Harmonic Distortion (THD) 3 Peak Harmonic or Spurious Noise (SFDR) Intermodulation Distortion (IMD Second-Order Terms Third-Order Terms Aperture Delay 4 Aperture Jitter ...
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... Twos Complement 800 300 300 1 2.7 5.25 2.7 5.25 0.15 750 2.5 1.55 100 960 0.5 0.02 0.5 12.5 500 2.5 2.5 Rev Page AD5590 Unit Test Conditions/Comments µA Typically 200 µ 2 5.25 V SOURCE 200 µA SINK µA weak/TRI bit set weak/TRI bit set to 0 coding bit set to 1 ...
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... AD5590 DAC SPECIFICATIONS DACV = 4 5. kΩ to DACGND unless otherwise noted. Table 2. Parameter STATIC PERFORMANCE 2 Resolution Integrated Nonlinearity (INL) Differential Nonlinearity (DNL) Zero-Code Error Zero-Code Error Drift 3 Full-Scale Error Gain Error Gain Temperature Coefficient 3 Offset Error DC Power Supply Rejection Ratio ...
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... Rev Page DAC active, excludes load DD = DACV = 4 5 DACGND DACV = 4 5 DACGND DACV . All specifications T REFIN1 REFIN1 ± 0.1 V p-p, frequency = MHz REFIN2 = ± 0.2 V p-p REFIN2 = ± 0.1 V p-p, frequency = 10 kHz REFIN2 AD5590 MIN MAX ...
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... AD5590 OPERATIONAL AMPLIFIER SPECIFICATIONS Electrical characteristics @ Table 4. Parameter INPUT CHARACTERISTICS Offset Voltage Offset Voltage Drift 1 Input Bias Current 1 Input Offset Current 1 Common-Mode Rejection Ratio Large Signal Voltage Gain Input Capacitance 1 OUTPUT CHARACTERISTICS Output Voltage High Output Voltage Low Short-Circuit Current ...
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... ASCLK falling edge to ASYNC high ) and timed from a voltage DD . DRIVE b before having ADD3 valid on the ADOUT line. If the ADOUT 3 , quoted in the timing characteristics, is the true bus relinquish DB2 DB1 DB0 t 8 DONTC DONTC DONTC 1.6V AD5590 QUIET THREE- STATE ...
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... AD5590 DAC Timing Characteristics All input signals are specified with ns/V (10 DACV = 4 5.5 V. All specifications T DD Table 6. Parameter 1 Limit DACV MIN MAX ...
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... ESD CAUTION ±10 mA −40°C to +85°C −65°C to +150°C 150°C Rev Page θ Max Unit Comments 1, 2 130 ° the sum of ADC, DAC, and operational amplifier supply currents. AD5590 Unit °C × θ TOTAL JA ...
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... AD5590 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS VOUT14 VOUT10 VOUT8 VIN12 VIN10 VOUT12 OUT7 VOUT9 IN7(–) VOUT11 IN7(+) VOUT13 IN6(+) VOUT15 V REFIN2 / IN6(–) V REFOUT2 V2– VIN15 OUT6 V REFA OUT5 VIN14 IN5(–) VIN11 VIN13 IN5(+) IN4(+) IN4(–) Table 10. Pin Function Descriptions Pin No ...
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... OUT0 to Output Terminals for Operational Amplifier 0 to Amplifier 7. K12, J12, C12 OUT7 nd falling edge, the rising edge of DSYNC1 acts as an interrupt and the write nd falling edge, the rising edge of DSYNC2 acts as an interrupt and the write Rev Page AD5590 pins DD ...
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... AD5590 TYPICAL PERFORMANCE CHARACTERISTICS DAC DACV and ADCV = unless otherwise noted 1.0 DACV = REF T = 25°C 0.8 A 0.6 0.4 0.2 0 –0.2 –0.4 –0.6 –0.8 –1.0 0 500 1000 1500 2000 2500 CODE Figure 6. DAC INL, External Reference 0.20 DACV = REF T = 25° ...
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... Figure 15. DAC Power-On Reset DSYNC DSCLK VOUT DACV = 5V DD CH2 500mV M400ns A CH1 Figure 16. DAC Exiting Power-Down to Midscale DACV = 2.5V REFOUT T = 25°C A 4ns/SAMPLE NUMBER GLITCH IMPULSE = 3.55nV-sec 1 LSB CHANGE AROUND MIDSCALE (0x8000 TO 0x7FFF) 64 128 192 256 320 384 448 SAMPLE AD5590 = 5V 1.4V 512 ...
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... AD5590 2.5000 2.4995 2.4990 2.4985 2.4980 2.4975 2.4970 2.4965 2.4960 2.4955 2.4950 0 64 128 192 256 320 SAMPLE Figure 18. DAC Analog Crosstalk 2.4900 2.4895 2.4890 2.4885 2.4880 2.4875 2.4870 2.4865 2.4860 2.4855 0 64 128 192 256 320 SAMPLE Figure 19. DAC-to-DAC Crosstalk ...
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... DACV CAPACITANCE (nF) Figure 23. DAC Settling Time vs. Capacitive Load 5 0 –5 –10 –15 –20 –25 –30 –35 –40 8k 10k 10k Rev Page AD5590 DACV = 25°C A 100k 1M FREQUENCY (Hz) Figure 24. DAC Multiplying Bandwidth 10M ...
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... AD5590 ADC DACV and ADCV = unless otherwise noted –15 –35 –55 –75 – 100 150 200 250 300 FREQUENCY (kHz) Figure 25. ADC Dynamic Performance at 1 MSPS 75 ADCV 70 ADCV MAX THROUGHPUT 25°C A RANGE = REFA ...
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... TEMPERATURE (°C) Figure 34. Amplifier Input Bias Current vs. Temperature ±2. –40 – TEMPERATURE (°C) Figure 35. Amplifier Supply Current vs. Temperature 25ºC A 100 V – SOURCE 10 1 SINK V OL 0.1 0.01 0.001 0.01 0.1 1 LOAD CURRENT (mA) AD5590 125 150 110 10 ...
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... AD5590 – 1mA 1mA –40 –25 – TEMPERATURE (°C) Figure 37. Amplifier Output Saturation Voltage vs. Temperature (I 350 300 V – 10mA DD OH 250 200 V @ 10mA OL 150 100 50 0 –40 –25 – TEMPERATURE (°C) Figure 38 ...
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... Figure 46. Amplifier Positive Overload Recovery 2 –100 Figure 47. Amplifier Negative Overload Recovery V = ±2. 10kΩ p-p IN Figure 48. Amplifier, No Phase Reversal Rev Page AD5590 V = ±2. –50 V TIME (20µs/DIV ±2. –50 V TIME (20µs/DIV OUT TIME (20µs/DIV) ...
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... AD5590 TIME (1s/DIV) Figure 49. Amplifier 0 Input Voltage Noise 1000 25°C A 100 10 1/F CORNER @ 100Hz 100 FREQUENCY (Hz) Figure 50. Amplifier Voltage Noise Density 140 120 100 1000 10000 Rev Page 100 1k 10k 100k FREQUENCY (Hz) Figure 51 ...
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... It is measured by loading one of the DACs with a full-scale code change (all 0s to all 1s or vice versa) with LDAC low and monitoring the output of another DAC. The energy of the glitch is expressed in nV-sec. Rev Page AD5590 OUT is held and DACV is DD ...
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... AD5590 Multiplying Bandwidth The amplifiers within the DAC have a finite bandwidth. The multiplying bandwidth is a measure of this. A sine wave on the reference (with full-scale code loaded to the DAC) appears on the output. The multiplying bandwidth is the frequency at which the output amplitude falls below the input. ...
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... As a result, the second- and third-order terms are specified separately. The calculation of the intermodulation distortion is as per the THD specification, where it is the ratio of the rms sum of the individual distortion products to the rms amplitude of the sum of the fundamentals expressed in decibels. Rev Page AD5590 ...
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... These amplifiers can be used independently or as part of signal condition for the input or output ports. DAC SECTION Sixteen DACs make up the output port of the AD5590. Each DAC consists of a string of resistors followed by an output buffer amplifier. The sixteen DACs are divided into two groups of eight with each group having its own internal 2 ...
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... Figure 28). Rev Page 4kΩ SW1 B SW2 COMPARATOR Figure 55. ADC Conversion Phase ADCV 30pF R1 VINx C1 D2 4pF CONVERSION PHASE—SWITCH OPEN TRACK PHASE—SWITCH CLOSED Figure 56. Equivalent Analog Input Circuit AD5590 CAPACITIVE DAC CONTROL LOGIC ...
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... AD5590 ADC Transfer Function The output coding of the ADC is either straight binary or twos complement, depending on the status of the LSB (range bit) in the ADC control register. The designed code transitions occur midway between successive LSB values (that is, 1 LSB, 2 LSBs, and so on). The LSB size is equal to V ...
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... CMOS ADCs, DACs, ASICs, and other wide output swing devices in low power, single-supply systems. The amplifiers in the AD5590 are fully independent of the DAC and ADC sections. If some or all of the amplifiers are not required, connect them as a grounded unity-gain buffer, as shown in Figure 59 ...
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... Figure 60. DAC Serial Interface Configuration Data from the DDIN line is clocked into the 32-bit shift register on the falling edge of DSCLK. The serial clock frequency can be as high as 50 MHz, making the AD5590 compatible with high speed DSPs. On the 32 nd falling clock edge, the last data bit is ...
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... Address bits (A3 to A0)—don’t care Rev Page RESISTOR AMPLIFIER STRING DAC POWER-DOWN RESISTOR CIRCUITRY NETWORK Figure 62. Output Stage During Power-Down DB31 DB0 ON THE 32ND FALLING EDGE LSB DB20 DB19 to DB1 DB0 X X 1/0 Don’t care Internal REF register AD5590 V OUT ...
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... AD5590 The bias generator of the selected DAC(s), output amplifier, resistor string, and other associated linear circuitry are shut down when the power-down mode is activated. The internal reference is powered down only when all channels are powered down. However, the contents of the DAC register are unaffected when in power-down. The time to exit power-down is typically 4 µ ...
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... DB8 DB7 DAC H DAC G DAC F DAC E DAC D DAC C DAC B DAC A Address bits (A3 to A0)— Don’t don’t care care Rev Page DB6 DB5 DB4 DB3 DB2 DB1 Setting LDAC bit to 1 overrides LDAC pin AD5590 LSB DB0 ...
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... AD5590 ACCESSING THE ADC BLOCK The ADC register can be accessed via the serial interface using the ASCLK , ADIN, ADOUT, and ASYNC pins. The V can be used to dictate the logic levels of the output pins, allow- ing the ADC to be interfaced DSP while the ADC is operating ...
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... TO KEEP PART IN THIS MODE, LOAD PM1 = 0, PM0 = 1 IN CONTROL REGISTER OR SET WRITE BIT = 0 PART ENTERS STANDBY ON ASYNC RISING EDGE AS PART IS FULLY PM1 = 0, PM0 = 0 POWERED DATA IN TO CONTROL/SHADOW REGISTER TO KEEP PART IN THIS MODE, LOAD PM1 = 0, PM0 = 0 IN CONTROL REGISTER AD5590 16 LT ...
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... AD5590 Powering Up the ADC When supplies are first applied to the ADC, the ADC can power up in any of the operating modes of the ADC. To ensure that the ADC is placed into the required operating mode, the user should perform a dummy cycle operation, as outlined in Figure 68. ...
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... DSP/microcontroller as the MSB of the 16-bit serial transfer. DB7 DB6 DB5 DB4 ADD1 ADD0 PM1 PM0 = 4. 5.25 V. Rev Page DB3 DB2 DB1 Shadow Weak/TRI Range ASCLK falling edge. th (for the next conversion). For REFA AD5590 LSB DB0 Coding ...
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... AD5590 Table 23. ADC Channel Selection ADD3 ADD2 Table 24. ADC Power Mode Selection PM1 PM0 Mode 1 1 Normal operation. In this mode, the ADC remains in full power mode regardless of the status of any of the logic inputs. This mode allows the fastest possible throughput rate from the ADC ...
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... CHANGE IN THE CONTROL REGISTER WITHOUT INTERRUPTING THE SEQUENCE PROVIDED, SEQ = 1, SHADOW = 0 Figure 71. Continuous Conversion Without Programming WRITE BIT = 1, SEQ = SHADOW = 0 Rev Page AD5590 POWER ON DUMMY CONVERSIONS ADIN = ALL 1s ADIN: WRITE TO CONTROL REGISTER, WRITE BIT = 1, SELECT CODING, RANGE, AND POWER MODE ...
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... AD5590 Table 26. ADC Shadow Register Bits MSB DB15 DB14 DB13 DB12 DB11 VIN0 VIN1 VIN2 VIN3 VIN4 ASYNC ASCLK t 3 ADD2 ADOUT THREE- t STATE ADD3 ADIN IN IN DB10 DB9 DB8 DB7 DB6 VIN5 VIN6 VIN7 VIN8 VIN9 ...
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... ADC spends less time in power-down states; thus, the difference in power dissipated is negligible between modes. mW 0.01 Rev Page × + × μ 868 ADCV = 5V DD AUTOSTANDBY AUTOSHUTDOWN 1 0 100 150 200 250 THROUGHPUT (kSPS) Figure 73. Power vs. Throughput Rate in Autoshutdown and Autostandby Mode AD5590 300 350 ...
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... AD5590 OUTLINE DIMENSIONS 2.50 SQ DETAIL A 1.50 1.36 1.21 ORDERING GUIDE Model 1 Temperature Range AD5590BBC −40°C to +85°C AD5590BBCZ −40°C to +85°C EVAL-AD5590EBZ RoHS Compliant Part. 10.00 BSC BALL A1 PAD CORNER 8.80 BSC SQ BOTTOM TOP VIEW 0.80 BSC 0.60 REF DETAIL A 0.65 REF 0.36 REF 0.35 NOM 0.30 MIN * 0 ...
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... NOTES Rev Page AD5590 ...
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... AD5590 NOTES ©2008–2011 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D07691-0-7/11(A) Rev Page ...