AD7147 Analog Devices, AD7147 Datasheet
AD7147
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AD7147 Summary of contents
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... GPIO. There the voltage level for the serial interface independent of V The AD7147 is available in a 24-lead × LFCSP and operates from a 2 3.6 V supply. The operating current con- sumption in low power mode is typically 26 μA for 13 sensors. ...
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... General Description ......................................................................... 1 Functional Block Diagram .............................................................. 1 Revision History ............................................................................... 3 Specifications..................................................................................... 4 Average Current Specifications .................................................. 5 SPI Timing Specifications (AD7147)......................................... Timing Specifications (AD7147-1) ..................................... 7 Absolute Maximum Ratings............................................................ 8 ESD Caution.................................................................................. 8 Pin Configurations and Function Descriptions ........................... 9 Typical Performance Characteristics ........................................... 10 Theory of Operation ...................................................................... 12 Capacitance Sensing Theory..................................................... 12 BIAS Pin....................................................................................... 13 Operating Modes........................................................................ 13 Capacitiance-to-Digital Converter ...
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... Added Figure 3, Renumbered Sequentially ...................................6 Changes to Low Power Mode Section..........................................13 Added Latency from Touch to Response Section.......................13 Added Low Latency from Touch to Response Section ..............13 Changes to Figure 60 and Figure 61 .............................................40 Changes to Figure 62 ......................................................................41 Added Exposed Pad Notation to Outline Dimensions ..............68 9/07—Revision 0: Initial Version Rev Page AD7147 ...
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... AD7147 SPECIFICATIONS 2 3 − +85°C, unless otherwise noted Table 1. Parameter CAPACITANCE-TO-DIGITAL CONVERTER Update Rate Resolution CINx Input Range No Missing Codes CINx Input Leakage Maximum Output Load Total Unadjusted Error Output Noise (Peak-to-Peak) Output Noise (RMS) ...
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... Current Values of Conversion Stages (μ 24.18 27.52 30.82 34.11 37.37 31.92 38.45 44.87 51.21 57.45 46.99 59.51 71.66 83.47 94.94 19.86 21.55 23.23 24.9 26.57 23.79 27.12 30.43 33.72 36.98 31.53 38.06 44.5 50.83 57.08 18.41 19.54 20.67 21.79 22.91 21.04 23.28 25.51 27.73 29.94 26.25 30.67 35.04 39.37 43.66 17.69 18.53 19.38 20.23 21.07 19.66 21.35 23.03 24.7 26.37 23.59 26.93 30.24 33.53 36.79 1 Current Values of Conversion Stages (μ 32.06 36.12 40.15 44.16 48.12 41.49 49.44 57.26 64.97 72.55 59.85 75.05 89.79 104.09 117.97 26.8 28.86 30.91 32.95 34.99 31.59 35.66 39.7 43.71 47.68 41.04 49 56.83 64.54 72.12 25.04 26.42 27.79 29.17 30.53 28.25 30.99 33.71 36.41 39.1 34.61 40 45.33 50.6 55.82 24.16 25.19 26.23 27.26 28.29 26.57 28.63 30.68 32.72 34.76 31.36 35.44 39.47 43.48 47.46 Rev Page 40.6 43.81 46.99 50.16 53.3 63.6 69.66 75.63 81.52 87.33 106.1 116.96 127.52 137.81 147.82 28.23 29.88 31.53 33.17 34.81 40.22 43.43 46.62 49.78 52.93 63.23 69.3 75.28 81.17 86.98 24.03 25.14 26.25 27.36 28.47 32.13 34.32 36.49 38.65 40.81 47.9 52.11 56.27 60.39 64.47 21.91 22.75 23.59 24.43 25.26 28.03 29.69 31.34 32.98 34.62 40.03 43.24 46.43 49.6 52. 52.06 55.97 59.85 63.69 67.51 80.02 87.37 94.61 101.74 108.77 131.45 144.53 157.25 169.61 181.63 37.01 39.03 41.04 43.04 45.03 51.62 55.53 59.41 63.26 67.08 79.6 86.96 94.2 101.34 108.37 31.89 33.25 34.61 35.96 37.31 41.78 44.44 47.09 49.72 52.34 60.98 66.09 71.15 76.15 81.1 29.32 30.34 31.36 32.38 33.4 36.79 38.8 40.81 42.81 44.81 51.4 55.31 59.19 63.04 66.86 AD7147 12 56.41 93.05 157.58 36.44 56.05 92.71 29.57 42.95 68.51 26.09 36.25 55.86 12 71.29 115.69 193.33 47.02 70.87 115.3 38.66 54.95 86.01 34.42 46.79 70.66 ...
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... AD7147 SPI TIMING SPECIFICATIONS (AD7147 −40°C to +85°C, sample tested at 25°C to ensure compliance noted. All input signals are specified with t Table 4. SPI Timing Specifications Parameter Limit f 5 SCLK ...
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... Data Sheet TIMING SPECIFICATIONS (AD7147- −40°C to +85°C, sample tested at 25°C to ensure compliance noted. All input signals timed from a voltage level of 1 Table Timing Specifications Parameter Limit f 400 SCLK 100 4 t 300 ...
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... AD7147 ABSOLUTE MAXIMUM RATINGS Table 6. Parameter V to GND CC Analog Input Voltage to GND Digital Input Voltage to GND Digital Output Voltage to GND 1 Input Current to Any Pin Except Supplies ESD Rating (Human Body Model) Operating Temperature Range Storage Temperature Range Junction Temperature LFCSP Power Dissipation θ ...
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... Capacitance Sensor Input. Capacitance Sensor Input. Capacitance Sensor Input. Rev Page AD7147 PIN 1 INDICATOR CIN6 1 18 GPIO CIN7 2 17 INT CIN8 3 AD7147-1 16 ADD1 CIN9 4 15 SCLK TOP VIEW CIN10 5 14 ADD0 (Not to Scale) CIN11 6 13 SDA Figure 6. AD7147-1 Pin Configuration ...
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... AD7147 TYPICAL PERFORMANCE CHARACTERISTICS 935 915 895 DECIMATION = 64 875 DECIMATION = 128 855 835 815 795 2.6 2.7 2.8 2.9 3.0 3.1 3.2 V (V) CC Figure 7. Supply Current vs. Supply Voltage 180 200ms 160 140 120 100 400ms 80 600ms 60 800ms 2.5 2.7 2.9 3.1 V (V) CC Figure 8. Low Power Supply Current vs. Supply Voltage, Decimation Rate = 256 ...
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... SQUARE WAVE FREQUENCY (Hz) Figure 17. Power Supply Square Wave Rejection 10000 20000 30000 40000 50000 CDC OUTPUT CODE Figure 18. CDC Linearity 3 AD7147 = 3 3 60000 ...
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... The external sensors consist of an electrode on a single- or multiple-layer PCB that interfaces directly to the AD7147. The AD7147 can be set up to implement any set of input sensors by programming the on-chip registers. The registers can also be programmed to control features such as averaging, offsets, and gains for each of the external sensors ...
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... STAGEx_LOW_THRESHOLD an open source basis. BIAS PIN This pin is connected internally to a bias node of the AD7147. To ensure correct operation of the AD7147, connect a 100 nF capacitor between the BIAS pin and ground. The voltage seen at the BIAS pin is V OPERATING MODES The AD7147 has three operating modes ...
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... Figure 22. Low Power Mode Operation, AD7147 settings. See the CDC Conversion Sequence Time section for more information.) The time for the AD7147 to transition from a full power state to a reduced power state after the user stops touching the external sensors is configurable. The PWR_DOWN_TIMEOUT bits (in ...
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... The number of required conversion stages depends solely on the number of sensors attached to the AD7147. Figure 26 shows how many conversion stages are required for each sensor and how many inputs to the AD7147 each sensor requires. ...
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... STAGE4 + CDC – STAGE5 + CDC – STAGE6 + CDC – STAGE7 + – CDC Figure 26. Sequencer Setup for Sensors Rev Page AD7147 SEQUENCER BUTTONS STAGE8 B1 + CDC – STAGE9 B2 + CDC – B3 AD7147 SEQUENCER STAGE10 + CDC – SLIDER STAGE11 + CDC – Data Sheet ...
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... In addition to the results registers in the Bank 3 registers, the AD7147 provides the 16-bit CDC output data directly, starting at Address 0x00B of Bank 1. Reading back the CDC 16-bit conversion data register allows for customer-specific application data processing ...
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... Connecting a CINx input pin to the negative CDC input results in a decrease in CDC output code when the corresponding sensor is activated. The AD7147 performs a sequence of 12 conversions. The multi- plexer can have different settings for each of the 12 conversions. For example, CIN0 is connected to the negative CDC input for conversion STAGE1, left floating for conversion STAGE1, and so on, for all 12 conversion stages ...
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... This means that the ambient value stored on the AD7147 no longer represents the actual ambient value. In this case, even when the user is not in close proximity to the sensor, the prox- imity flag may still be set ...
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... AD7147 Table 12. Proximity Control Registers (See Figure 34) Length Bit Name (Bits) FP_PROXIMITY_CNT 4 LP_PROXIMITY_CNT 4 FP_PROXIMITY_RECAL 8 LP_PROXIMITY_RECAL 6 PROXIMITY_RECAL_LVL 8 PROXIMITY_DETECTION_RATE 6 USER APPROACHES SENSOR CDC CONVERSION SEQUENCE (INTERNAL) PROXIMITY DETECTION (INTERNAL) CALIBRATION (INTERNAL) Figure 30. Example of Full Power Mode Proximity Detection (FP_PROXIMITY_CNT = 1) USER APPROACHES SENSOR ...
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... BY PROXIMITY_RECAL _LVL CALDIS RECALIBRATION TIMEOUT t RECAL_TIMEOUT t (SEE TABLE 10). CONV_FP × FP_PROXIMITY_RECAL. MEASURED CDC VALUE > STORED AMBIENT BY PROXIMITY_RECAL _LVL CALDIS RECALIBRATION TIMEOUT t RECAL_TIMEOUT LP_CONV_DELAY. CONV_LP CONV_FP × LP_PROXIMITY_RECAL. Rev Page AD7147 t RECAL t CONV_FP 70 CALIBRATION ENABLED t RECAL t CONV_LP 70 CALIBRATION ENABLED ...
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... Table 13 shows how FF_SKIP_CNT controls the update rate of the fast FIFO. The recommended value for the setting when using all 12 conversion stages on the AD7147 is 0000 samples skipped. FAST FIFO Update Rate Decimation = 128 1.536 × ...
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... WORD3| PROXIMITY_DETECTION_RATE REGISTER 0x003 STAGEx_FF_AVG BANK 3 REGISTERS COMPARATOR 2 |AVERAGE – AMBIENT| SW1 PROXIMITY_RECAL_LVL REGISTER 0x003 STAGEx_SF_AMBIENT BANK 3 REGISTERS Figure 34. AD7147 Proximity-Detection Logic Rev Page AD7147 FP_PROXIMITY_CNT LP_PROXIMITY_CNT REGISTER 0x002 REGISTER 0x002 PROXIMITY PROXIMITY TIMING CONTROL LOGIC FP_PROXIMITY_RECAL LP_PROXIMITY_RECAL ...
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... STAGEx_OFFSET_HIGH and STAGEx_OFFSET_LOW values and are based on the threshold sensitivity settings and the ambient value. These values are sufficient to detect a sensor contact and result in the AD7147 asserting the INT output when the threshold levels are exceeded. SENSOR 1 INT ASSERTED ...
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... Determining the AVG_FP_SKIP and AVG_LP_SKIP values is required only once during the initial setup of the capacitance sensor interface. The recommended values for these settings when using all 12 conversion stages on the AD7147 are as follows: • • Rev Page ⎞ ...
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... AD7147 SLOW_FILTER_UPDATE_LVL The SLOW_FILTER_UPDATE_LVL controls whether the most recent CDC measurement goes into the slow FIFO (slow filter). The slow filter is updated when the difference between the current CDC value and the last value of the slow FIFO is greater than the value of SLOW_FILTER_UPDATE_LVL. This variable is in Ambient Control Register 1 (AMB_COMP_CTRL1) (Address 0x003) ...
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... This algorithm continu- ously monitors the output levels of each sensor and automatically rescales the threshold levels in proportion to the sensor area covered by the user result, the AD7147 maintains optimal threshold and sensitivity levels for all users regardless of their finger sizes. ...
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... STAGEx_OFFSET_LOW_CLAMP value. Used in Equation 1. An initial value (based on sensor characterization) is programmed into this register at startup. The AD7147 on-chip calibration algorithm automatically updates this register based on the amount of sensor drift due to changing ambient conditions. Set this register to 80% of the STAGEx_OFFSET_HIGH_CLAMP value. ...
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... Setting this bit to 1 enables the interrupt for that stage. Clearing this bit to 0 disables the conversion-complete interrupt for that stage. The AD7147 interrupt should be enabled only for the last stage in a conversion sequence. For example, if there are five conver- sion stages, only the conversion-complete interrupt for STAGE4 is enabled ...
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... AD7147 STAGE0 STAGE1 STAGE2 CONVERSIONS INT 1 SERIAL READS NOTES THIS IS AN EXAMPLE OF A CDC CONVERSION-COMPLETE INTERRUPT. THIS TIMING EXAMPLE SHOWS THAT THE INTERRUPT OUTPUT HAS BEEN ENABLED TO BE ASSERTED AT THE END OF A CONVERSION CYCLE FOR STAGE0, STAGE5, AND STAGE9. THE INTERRUPTS FOR ALL OTHER STAGES HAVE BEEN DISABLED. ...
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... GPIO INPUT HIGH WHEN REGISTER IS READ BACK GPIO INPUT OUTPUT GPIO INPUT LOW WHEN REGISTER IS READ BACK GPIO INPUT OUTPUT 1 READ GPIO_INT_STATUS BIT TO RESET INT OUTPUT. Figure 44. Example of INT Output Controlled by the GPIO Input Rev Page INT INT (GPIO_SETUP = 01, GPIO_INPUT_CONFIG = 01) AD7147 ...
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... AD7147 SERIAL READBACK GPIO INPUT LOW WHEN REGISTER IS READ BACK GPIO INPUT INT OUTPUT GPIO INPUT HIGH WHEN REGISTER IS READ BACK GPIO INPUT INT OUTPUT 1 READ GPIO_INT_STATUS BIT TO RESET INT OUTPUT. Figure 45. Example of INT Output Controlled by the GPIO Input (GPIO_SETUP = 01, GPIO_INPUT_CONFIG = 10) Table 15 ...
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... CINx inputs are correctly shielded using AC . SHIELD GENERAL-PURPOSE INPUT/OUTPUT (GPIO) The AD7147 has one GPIO pin. It can be configured as an input or an output. The GPIO_SETUP Bits[13:12] in the interrupt enable register determine how the GPIO pin is configured. Table 16. GPIO_SETUP Bits GPIO_SETUP ...
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... The master then supplies the 16-bit input data-word on the SDI line. The AD7147 clocks the data into the register addressed in the command word. If there is more than one word of data to be clocked in, the AD7147 automatically incre- ments the address pointer and clocks the subsequent data-word into the next register ...
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... Reading Data A read transaction begins when the master writes the command word to the AD7147 with the read/write bit set to 1. The master then supplies 16 clock pulses per data-word to be read, and the AD7147 clocks out data from the addressed register on the SDO line ...
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... When all data bytes are read or written, a stop condition is established. A stop condition is defined by a low-to-high transition on SDA while SCLK remains high. If the AD7147 encounters a stop condition, it returns to its idle condition, and the address pointer register resets to Address 0x00. ...
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... Therefore, any data written to the AD7147-1 after the address pointer has reached its maximum value is discarded bus is All registers on the AD7147-1 are 16 bits. Two consecutive 8-bit data bytes are combined and written to the 16-bit registers. To avoid errors, all writes to the device must contain an even number of data bytes. ...
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... ACK = ACKNOWLEDGE BIT ACK = NO ACKNOWLEDGE BIT 2 Figure 55. Example of Sequential I C Write and Readback Operations This allows the AD7147 to be connected directly to processors whose supply voltage is less than the minimum operating voltage of the AD7147 without the need for external level and SPI serial shifters ...
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... Connect the PCB thermal pad to GND. Rev Page Symbol Min Typ D 0 1.0 5 CAPACITIVE SENSOR BOARD 5 GROUNDED METAL SHIELD CONTROLLER PRINTED CIRCUIT BOARD OR METAL CASING Figure 58. Capacitive Sensor Board with Grounded Shield AD7147 Max Unit ...
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... For buttons, the interrupt status registers are read back while other sensors read data back from the AD7147 according to the slider or wheel algorithm’s requirements. Analog Devices can provide this information after the user develops the sensor board. ...
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... Rev Page DRIVE HOST WITH SPI 2.2kΩ GPIO INTERFACE 18 17 INT INT SCLK SCK 14 SDI MOSI 13 SDO MISO V HOST V 2.7V TO 3.6V CC 1.8V 1μF TO 10μF (OPTIONAL) DRIVE V DRIVE 2.2kΩ V DRIVE 2.2kΩ 2 HOST WITH I C 2.2kΩ INTERFACE INT SCK SDO 2.7V TO 3.6V AD7147 ...
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... These registers automatically update at the end of each conversion sequence. Although these registers are primarily used by the AD7147 internal data processing, they are accessible by the host processor for additional external data processing, if desired. Default values are undefined for Bank 2 registers and Bank 3 registers until after power-up and configuration of the Bank 2 registers ...
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... Interrupt polarity control 0 = active low 1 = active high R/W EXT_SOURCE Excitation source control 0 = enable excitation source to CINx pins 1 = disable excitation source to CINx pins Unused Set to 0 R/W CDC_BIAS CDC bias current control 00 = normal operation 01 = normal operation + 20 normal operation + 35 normal operation + 50% Rev Page AD7147 ...
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... AD7147 Table 21. STAGE_CAL_EN Register Default Address Data Bit Value Type 0x001 [0] 0 R/W [1] 0 R/W [2] 0 R/W [3] 0 R/W [4] 0 R/W [5] 0 R/W [6] 0 R/W [7] 0 R/W [8] 0 R/W [9] 0 R/W [10] 0 R/W [11] 0 R/W [13:12] 0 R/W [15:14] 0 R/W Name Description STAGE0_CAL_EN STAGE0 calibration enable 0 = disable 1 = enable STAGE1_CAL_EN STAGE1 calibration enable 0 = disable 1 = enable STAGE2_CAL_EN STAGE2 calibration enable ...
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... PROXIMITY_DETECTION_RATE Proximity detection rate; the value is multiplied determine actual detection rate SLOW_FILTER_UPDATE_LVL Slow filter update level Name Description FP_PROXIMITY_RECAL Full power mode proximity recalibration time control LP_PROXIMITY_RECAL Low power mode proximity recalibration time control Rev Page AD7147 ...
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... AD7147 Table 25. STAGE_LOW_INT_ENABLE Register Default Address Data Bit Value Type 0x005 [0] 0 R/W [1] 0 R/W [2] 0 R/W [3] 0 R/W [4] 0 R/W [5] 0 R/W [6] 0 R/W [7] 0 R/W [8] 0 R/W [9] 0 R/W [10] 0 R/W [11] 0 R/W [13:12] 0 R/W [15:14] 0 R/W Name Description STAGE0_LOW_INT_ENABLE STAGE0 low interrupt enable 0 = interrupt source disabled 1 = INT asserted if STAGE0 low threshold is exceeded STAGE1_LOW_INT_ENABLE ...
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... INT asserted if STAGE9 high threshold is exceeded STAGE10_HIGH_INT_ENABLE STAGE10 high interrupt enable 0 = interrupt source disabled 1 = INT asserted if STAGE10 high threshold is exceeded STAGE11_HIGH_INT_ENABLE STAGE11 high interrupt enable 0 = interrupt source disabled 1 = INT asserted if STAGE11 high threshold is exceeded Unused Set to 0 Rev Page AD7147 ...
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... AD7147 Table 27. STAGE_COMPLETE_INT_ENABLE Register Default Address Data Bit Value Type 0x007 [0] 0 R/W [1] 0 R/W [2] 0 R/W [3] 0 R/W [4] 0 R/W [5] 0 R/W [6] 0 R/W [7] 0 R/W [8] 0 R/W [9] 0 R/W [10] 0 R/W [11] 0 R/W [12] 0 R/W [15:13] Name Description STAGE0_COMPLETE_INT_ENABLE STAGE0 conversion interrupt control 0 = interrupt source disabled 1 = INT asserted at completion of STAGE0 conversion STAGE1_COMPLETE_INT_ENABLE STAGE1 conversion interrupt control ...
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... STAGE9 CDC conversion low limit interrupt result 1 = indicates STAGE9_LOW_THRESHOLD value was exceeded STAGE10_LOW_INT_STATUS STAGE10 CDC Conversion Low Limit Interrupt result 1 = indicates STAGE10_LOW_THRESHOLD value was exceeded STAGE11_LOW_INT_STATUS STAGE11 CDC conversion low limit interrupt result 1 = indicates STAGE11_LOW_THRESHOLD value was exceeded Unused Set to 0 Rev Page AD7147 ...
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... AD7147 Table 29. STAGE_HIGH_INT_STATUS Register Default Address Data Bit Value Type 0x009 [ [ [ [ [ [ [ [ [ [ [10 [11 [15:12] 1 Registers self-clear to 0 after readback if the limits are not exceeded. 1 Name Description ...
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... STAGE5 CDC 16-bit conversion data CDC_RESULT_S6 STAGE6 CDC 16-bit conversion data CDC_RESULT_S7 STAGE7 CDC 16-bit conversion data CDC_RESULT_S8 STAGE8 CDC 16-bit conversion data CDC_RESULT_S9 STAGE9 CDC 16-bit conversion data CDC_RESULT_S10 STAGE10 CDC 16-bit conversion data CDC_RESULT_S11 STAGE11 CDC 16-bit conversion data Rev Page AD7147 ...
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... AD7147 Table 32. Device ID Register Default Address Data Bit Value Type 0x017 [3: [15:4] 147 R Table 33. Proximity Status Register Default Address Data Bit Value Type 0x042 [ [ [ [ [ [ [ [ [ [ [10 [11] ...
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... CIN5 connected to CDC positive input 11 = CIN5 connected to BIAS (connect unused CINx inputs) CIN6 connection setup 00 = CIN6 not connected to CDC inputs 01 = CIN6 connected to CDC negative input 10 = CIN6 connected to CDC positive input 11 = CIN6 connected to BIAS (connect unused CINx inputs) Set to 0 Rev Page AD7147 ...
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... AD7147 Table 35. STAGEx_CONNECTION[12:7] Register Description ( 11) Default Data Bit Value Type Name [1:0] X R/W CIN7_CONNECTION_SETUP [3:2] X R/W CIN8_CONNECTION_SETUP [5:4] X R/W CIN9_CONNECTION_SETUP [7:6] X R/W CIN10_CONNECTION_SETUP [9:8] X R/W CIN11_CONNECTION_SETUP [11:10] X R/W CIN12_CONNECTION_SETUP [13:12] X R/W SE_CONNECTION_SETUP [14] X R/W NEG_AFE_OFFSET_DISABLE [15] X R/W POS_AFE_OFFSET_DISABLE Description CIN7 connection setup 00 = CIN7 not connected to CDC inputs 01 = CIN7 connected to CDC negative input 10 = CIN7 connected to CDC positive input ...
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... Positive threshold sensitivity control 0000 = 25%, 0001 = 29.73%, 0010 = 34.40%, 0011 = 39.08% 0100 = 43.79%, 0101 = 48.47%, 0110 = 53.15% 0111 = 57.83%, 1000 = 62.51%, 1001 = 67.22% 1010 = 71.90%, 1011 = 76.58%, 1100 = 81.28% 1101 = 85.96%, 1110 = 90.64%, 1111 = 95.32% Positive peak detect setting 000 = 40% level, 001 = 50% level, 010 = 60% level 011 = 70% level, 100 = 80% level, 101 = 90% level Set to 0 Rev Page AD7147 ...
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... AD7147 Table 38. STAGE0 to STAGE11 Configuration Registers Address Data Bit Default Type 0x080 [15:0] X R/W 0x081 [15:0] X R/W 0x082 [15:0] X R/W 0x083 [15:0] X R/W 0x084 [15:0] X R/W 0x085 [15:0] X R/W 0x086 [15:0] X R/W 0x087 [15:0] X R/W 0x088 [15:0] X R/W 0x089 [15:0] X R/W 0x08A [15:0] X R/W 0x08B [15:0] X R/W 0x08C [15:0] X R/W 0x08D [15:0] X R/W 0x08E [15:0] X R/W 0x08F [15:0] X R/W 0x090 [15:0] X R/W 0x091 [15:0] X R/W 0x092 [15:0] X R/W 0x093 [15:0] X R/W 0x094 [15:0] X R/W 0x095 [15:0] X R/W 0x096 [15:0] X R/W 0x097 [15:0] X R/W 0x098 [15:0] X R/W 0x099 [15:0] X R/W 0x09A [15:0] X R/W 0x09B [15:0] X R/W 0x09C [15:0] X R/W 0x09D ...
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... STAGE11_AFE_OFFSET STAGE11 AFE offset control (see Table 36) STAGE11_SENSITIVITY STAGE11 sensitivity control (see Table 37) STAGE11_OFFSET_LOW STAGE11 initial offset low value STAGE11_OFFSET_HIGH STAGE11 initial offset high value STAGE11_OFFSET_HIGH_CLAMP STAGE11 offset high clamp value STAGE11_OFFSET_LOW_CLAMP STAGE11 offset low clamp value Rev Page AD7147 ...
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... AD7147 BANK 3 REGISTERS All address values are expressed in hexadecimal. Table 39. STAGE0 Results Registers Default Address Data Bit Value Type 0x0E0 [15:0] X R/W 0x0E1 [15:0] X R/W 0x0E2 [15:0] X R/W 0x0E3 [15:0] X R/W 0x0E4 [15:0] X R/W 0x0E5 [15:0] X R/W 0x0E6 [15:0] X R/W 0x0E7 [15:0] X R/W 0x0E8 [15:0] X R/W 0x0E9 [15:0] X R/W 0x0EA [15:0] X R/W 0x0EB [15:0] X R/W 0x0EC [15:0] X R/W 0x0ED [15:0] X R/W 0x0EE [15:0] X R/W 0x0EF [15:0] X R/W 0x0F0 [15:0] X R/W 0x0F1 [15:0] X R/W 0x0F2 [15:0] X R/W 0x0F3 [15:0] X R/W 0x0F4 [15:0] X R/W 0x0F5 ...
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... STAGE1_MIN_WORD1 STAGE1 minimum value FIFO WORD1 STAGE1_MIN_WORD2 STAGE1 minimum value FIFO WORD2 STAGE1_MIN_WORD3 STAGE1 minimum value FIFO WORD3 STAGE1_MIN_AVG STAGE1 average minimum FIFO value STAGE1_LOW_THRESHOLD STAGE1 low threshold value STAGE1_MIN_TEMP STAGE1 temporary minimum value Unused Set to 0 Rev Page AD7147 ...
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... AD7147 Table 41. STAGE2 Results Registers Default Address Data Bit Value Type 0x128 [15:0] X R/W 0x129 [15:0] X R/W 0x12A [15:0] X R/W 0x12B [15:0] X R/W 0x12C [15:0] X R/W 0x12D [15:0] X R/W 0x12E [15:0] X R/W 0x12F [15:0] X R/W 0x130 [15:0] X R/W 0x131 [15:0] X R/W 0x132 [15:0] X R/W 0x133 [15:0] X R/W 0x134 [15:0] X R/W 0x135 [15:0] X R/W 0x136 [15:0] X R/W 0x137 [15:0] X R/W 0x138 [15:0] X R/W 0x139 [15:0] X R/W 0x13A [15:0] X R/W 0x13B [15:0] X R/W 0x13C [15:0] X R/W 0x13D [15:0] X R/W 0x13E [15:0] X R/W 0x13F [15:0] X R/W 0x140 [15:0] X R/W 0x141 [15:0] X R/W 0x142 [15:0] X R/W 0x143 [15:0] X R/W 0x144 [15:0] X R/W 0x145 ...
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... STAGE3_MIN_WORD1 STAGE3 minimum value FIFO WORD1 STAGE3_MIN_WORD2 STAGE3 minimum value FIFO WORD2 STAGE3_MIN_WORD3 STAGE3 minimum value FIFO WORD3 STAGE3_MIN_AVG STAGE3 average minimum FIFO value STAGE3_LOW_THRESHOLD STAGE3 low threshold value STAGE3_MIN_TEMP STAGE3 temporary minimum value Unused Set to 0 Rev Page AD7147 ...
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... AD7147 Table 43. STAGE4 Results Registers Default Address Data Bit Value Type 0x170 [15:0] X R/W 0x171 [15:0] X R/W 0x172 [15:0] X R/W 0x173 [15:0] X R/W 0x174 [15:0] X R/W 0x175 [15:0] X R/W 0x176 [15:0] X R/W 0x177 [15:0] X R/W 0x178 [15:0] X R/W 0x179 [15:0] X R/W 0x17A [15:0] X R/W 0x17B [15:0] X R/W 0x17C [15:0] X R/W 0x17D [15:0] X R/W 0x17E [15:0] X R/W 0x17F [15:0] X R/W 0x180 [15:0] X R/W 0x181 [15:0] X R/W 0x182 [15:0] X R/W 0x183 [15:0] X R/W 0x184 [15:0] X R/W 0x185 [15:0] X R/W 0x186 [15:0] X R/W 0x187 [15:0] X R/W 0x188 [15:0] X R/W 0x189 [15:0] X R/W 0x18A [15:0] X R/W 0x18B [15:0] X R/W 0x18C [15:0] X R/W 0x18D ...
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... STAGE5_MIN_WORD1 STAGE5 minimum value FIFO WORD1 STAGE5_MIN_WORD2 STAGE5 minimum value FIFO WORD2 STAGE5_MIN_WORD3 STAGE5 minimum value FIFO WORD3 STAGE5_MIN_AVG STAGE5 average minimum FIFO value STAGE5_LOW_THRESHOLD STAGE5 low threshold value STAGE5_MIN_TEMP STAGE5 temporary minimum value Unused Set to 0 Rev Page AD7147 ...
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... AD7147 Table 45. STAGE6 Results Registers Default Address Data Bit Value Type 0x1B8 [15:0] X R/W 0x1B9 [15:0] X R/W 0x1BA [15:0] X R/W 0x1BB [15:0] X R/W 0x1BC [15:0] X R/W 0x1BD [15:0] X R/W 0x1BE [15:0] X R/W 0x1BF [15:0] X R/W 0x1C0 [15:0] X R/W 0x1C1 [15:0] X R/W 0x1C2 [15:0] X R/W 0x1C3 [15:0] X R/W 0x1C4 [15:0] X R/W 0x1C5 [15:0] X R/W 0x1C6 [15:0] X R/W 0x1C7 [15:0] X R/W 0x1C8 [15:0] X R/W 0x1C9 [15:0] X R/W 0x1CA [15:0] X R/W 0x1CB [15:0] X R/W 0x1CC [15:0] X R/W 0x1CD [15:0] X R/W 0x1CE [15:0] X R/W 0x1CF [15:0] X R/W 0x1D0 [15:0] X R/W 0x1D1 [15:0] X R/W 0x1D2 [15:0] X R/W 0x1D3 [15:0] X R/W 0x1D4 [15:0] X R/W 0x1D5 ...
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... STAGE7_MIN_WORD1 STAGE7 minimum value FIFO WORD1 STAGE7_MIN_WORD2 STAGE7 minimum value FIFO WORD2 STAGE7_MIN_WORD3 STAGE7 minimum value FIFO WORD3 STAGE7_MIN_AVG STAGE7 average minimum FIFO value STAGE7_LOW_THRESHOLD STAGE7 low threshold value STAGE7_MIN_TEMP STAGE7 temporary minimum value Unused Set to 0 Rev Page AD7147 ...
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... AD7147 Table 47. STAGE8 Results Registers Default Address Data Bit Value Type 0x200 [15:0] X R/W 0x201 [15:0] X R/W 0x202 [15:0] X R/W 0x203 [15:0] X R/W 0x204 [15:0] X R/W 0x205 [15:0] X R/W 0x206 [15:0] X R/W 0x207 [15:0] X R/W 0x208 [15:0] X R/W 0x209 [15:0] X R/W 0x20A [15:0] X R/W 0x20B [15:0] X R/W 0x20C [15:0] X R/W 0x20D [15:0] X R/W 0x20E [15:0] X R/W 0x20F [15:0] X R/W 0x210 [15:0] X R/W 0x211 [15:0] X R/W 0x212 [15:0] X R/W 0x213 [15:0] X R/W 0x214 [15:0] X R/W 0x215 [15:0] X R/W 0x216 [15:0] X R/W 0x217 [15:0] X R/W 0x218 [15:0] X R/W 0x219 [15:0] X R/W 0x21A [15:0] X R/W 0x21B [15:0] X R/W 0x21C [15:0] X R/W 0x21D ...
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... STAGE9_MIN_WORD1 STAGE9 minimum value FIFO WORD1 STAGE9_MIN_WORD2 STAGE9 minimum value FIFO WORD2 STAGE9_MIN_WORD3 STAGE9 minimum value FIFO WORD3 STAGE9_MIN_AVG STAGE9 average minimum FIFO value STAGE9_LOW_THRESHOLD STAGE9 low threshold value STAGE9_MIN_TEMP STAGE9 temporary minimum value Unused Set to 0 Rev Page AD7147 ...
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... AD7147 Table 49. STAGE10 Results Registers Default Address Data Bit Value Type 0x248 [15:0] X R/W 0x249 [15:0] X R/W 0x24A [15:0] X R/W 0x24B [15:0] X R/W 0x24C [15:0] X R/W 0x24D [15:0] X R/W 0x24E [15:0] X R/W 0x24F [15:0] X R/W 0x250 [15:0] X R/W 0x251 [15:0] X R/W 0x252 [15:0] X R/W 0x253 [15:0] X R/W 0x254 [15:0] X R/W 0x255 [15:0] X R/W 0x256 [15:0] X R/W 0x257 [15:0] X R/W 0x258 [15:0] X R/W 0x259 [15:0] X R/W 0x25A [15:0] X R/W 0x25B [15:0] X R/W 0x25C [15:0] X R/W 0x25D [15:0] X R/W 0x25E [15:0] X R/W 0x25F [15:0] X R/W 0x260 [15:0] X R/W 0x261 [15:0] X R/W 0x262 [15:0] X R/W 0x263 [15:0] X R/W 0x264 [15:0] X R/W 0x265 ...
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... STAGE11_MIN_WORD1 STAGE11 minimum value FIFO WORD1 STAGE11_MIN_WORD2 STAGE11 minimum value FIFO WORD2 STAGE11_MIN_WORD3 STAGE11 minimum value FIFO WORD3 STAGE11_MIN_AVG STAGE11 average minimum FIFO value STAGE11_LOW_THRESHOLD STAGE11 low threshold value STAGE11_MIN_TEMP STAGE11 temporary minimum value Unused Set to 0 Rev Page AD7147 ...
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... W = Qualified for Automotive Applications. AUTOMOTIVE PRODUCTS The AD7147W models are available with controlled manufacturing to support the quality and reliability requirements of automotive applications. Note that these automotive models may have specifications that differ from the commercial models; therefore, designers should review the Specifications section of this data sheet carefully. Only the automotive grade products shown are available for use in automotive applications ...
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... Data Sheet NOTES Rev Page AD7147 ...
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... AD7147 NOTES ©2007–2011 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D06663-0-9/11(D) Rev Page Data Sheet ...