AD7938-6 Analog Devices, AD7938-6 Datasheet - Page 14

• Manufacturer Part Number: AD7938-6
• Description: 8-Channel, 625 kSPS, 12-Bit Parallel ADCs with a Sequencer
• Manufacturer: Analog Devices

Specifications of AD7938-6

• Resolution (bits): 12bit
• # Chan: 8
• Sample Rate: 625kSPS
• Interface: Par
• Analog Input Type: Diff-Uni,SE-Uni
• Ain Range: Uni (Vref),Uni (Vref) x 2
• Adc Architecture: SAR
• Pkg Type: CSP,QFP

AD7938-6
Table 9. Analog Input Type Selection
Channel Address
ADD2
0
0
0
0
1
1
1
1
SEQUENCER OPERATION
The configuration of the SEQ and SHDW bits in the control
register allows the user to select a particular mode of operation
of the sequencer function. Table 10 outlines the four modes of
operation of the sequencer.
Writing to the Control Register to Program the
Sequencer
The AD7938-6 needs 13 full CLKIN periods to perform a
conversion. If the ADC does not receive the full 13 CLKIN
periods, the conversion aborts. If a conversion is aborted after
applying 12.5 CLKIN periods to the ADC, ensure that a rising
edge of CONVST or a falling edge of CLKIN is applied to the
part before writing to the control register to program the
sequencer. If these conditions are not met, the sequencer will
not be in the correct state to handle being reprogrammed for
another sequence of conversions and the performance of the
converter is not guaranteed.
SHADOW REGISTER
The shadow register on the AD7938-6 is an 8-bit, write-only
register. Data is loaded from DB0 to DB7 on the rising edge of
WR . The eight LSBs load into the shadow register. The
information is written into the shadow register provided that
ADD1
0
0
1
1
0
0
1
1
ADD0
0
1
0
1
0
1
0
1
MODE0 = 0, MODE1 = 0
Eight Single-Ended
Input Channels
V
V
V
V
V
V
V
V
V
IN
IN
IN
IN
IN
IN
IN
IN
IN+
0
1
2
3
4
5
6
7
V
AGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
IN−
MODE0 = 0, MODE1 = 1
Four Fully Differential
Input Channels
V
V
V
V
V
V
V
V
V
IN
IN
IN
IN
IN
IN
IN
IN
IN+
0
1
2
3
4
5
6
7
V
V
V
V
V
V
V
V
V
IN
IN
IN
IN
IN
IN
IN
IN
Rev. C | Page 14 of 32
IN−
1
0
3
2
5
4
7
6
the SEQ and SHDW bits in the control register were set to 0 and
1, respectively, in the previous write to the control register. Each
bit represents an analog input from Channel 0 through Channel 7.
A sequence of channels can be selected through which the
AD7938-6 cycles with each consecutive conversion after the
write to the shadow register.
To select a sequence of channels to be converted, if operating in
single-ended mode or Pseudo Mode 2, the associated channel
bit in the shadow register must be set for each required analog
input. When operating in fully differential mode or Pseudo
Mode 1, the associated pair of channel bits must be set for each
pair of analog inputs required in the sequence.
With each consecutive CONVST pulse after the sequencer has
been set up, the AD7938-6 progresses through the selected
channels in ascending order, beginning with the lowest channel.
This continues until a write operation occurs with the SEQ and
SHDW bits configured in any way except 1, 0 (see
When a sequence is set up in differential mode or Pseudo
Mode 1, the ADC does not convert on the inverse pairs (that is,
V
outlined in
further information on using the sequencer.
MODE0 = 1, MODE1 = 0
Four Pseudo Differential Input
Channels (Pseudo Mode 1)
V
V
V
V
V
V
V
V
V
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN+
1, V
0
1
2
3
4
5
6
7
IN
0). The bit functions of the shadow register are
Table 11
V
V
V
V
V
V
V
V
V
IN
IN
IN
IN
IN
IN
IN
IN
IN−
1
0
3
2
5
4
7
6
. See the
Analog Input Selection
MODE0 = 1, MODE1 = 1
Seven Pseudo Differential
Input Channels (Pseudo Mode 2)
V
V
V
V
V
V
V
V
Not Allowed
IN
IN
IN
IN
IN
IN
IN
IN+
0
1
2
3
4
5
6
Data Sheet
Table 10
V
V
V
V
V
V
V
V
Not Allowed
IN
IN
IN
IN
IN
IN
IN
IN−
section for
7
7
7
7
7
7
7
).