AD7739 Analog Devices, AD7739 Datasheet
AD7739
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AD7739 Summary of contents
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... Other parts in the AD7739 family are the AD7738, AD7734, and AD7732. The AD7738 is similar to the AD7739 but has higher speed (8.5 kHz channel switching for 16-bit performance) and higher AIN leakage current. The AD7738 multiplexer output is pinned out externally, allowing the user to implement programmable gain or signal conditioning before being applied to the ADC ...
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... Channel Conversion Time Registers ....................................... 20 Mode Register ............................................................................. 20 REVISION HISTORY Revision 0: Initial Version Digital Interface Description ........................................................ 22 Hardware ..................................................................................... 22 Reset ............................................................................................. 23 Access the AD7739 Registers.................................................... 23 Single Conversion and Reading Data ...................................... 23 Dump Mode................................................................................ 23 Continuous Conversion Mode ................................................. 24 Continuous Read (Continuous Conversion) Mode .............. 25 Circuit Description......................................................................... 26 Analog Inputs.............................................................................. 26 Sigma-Delta ADC....................................................................... 26 Chopping ...
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... FSR mV Before Calibration µV/°C % Before Calibration ppm of FS/° FSR Before Calibration ppm of FS/° FSR After Calibration dB At DC, AIN = DC, AIN = V/Conv. Time AIN Absolute Voltage > Only One Channel, Chop Disabled AD7739 ...
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... AD7739 Parameter REFERENCE INPUTS 1, 9 REFIN(+) to REFIN(–) Voltage NOREF Trigger Voltage REFIN(+), REFIN(–) Common-Mode/ 1 Absolute Voltage 10 Reference Input DC Current 1, 11 SYSTEM CALIBRATION Full-Scale Calibration Limit Zero-Scale Calibration Limit Input Span LOGIC INPUTS Input Current Input Current CS Input Capacitance ...
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... Min Typ Max 4.75 5.25 4.75 5.25 2.70 3.60 13.6 16 9.2 11 8.5 2.7 3 1.0 1.5 85 100 500 . REF , P0 and Rev Page Unit Test Conditions/Comments MCLK = 4 MHz MCLK = 4 MHz MCLK = 4 MHz DD µA µW AD7739 ...
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... AD7739 TIMING SPECIFICATIONS Table 2. ( ± ± 5%; Input Logic Logic unless otherwise noted.) Parameter Min Master Clock Range 500 2 Read Operation ...
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... Figure 4. Load Circuit for Access Time and Bus Relinquish Time Rev Page LSB 03742-0-002 t 16 LSB 03742-0-003 I (800µ SINK DD 100µ 3V) DD 1.6V I (200µ SOURCE DD 100µ 3V) DD 03742-0-004 AD7739 ...
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... AD7739 ABSOLUTE MAXIMUM RATINGS Table 25°C, unless otherwise noted.) A Parameter AV to AGND DGND DD DD AGND to DGND AIN, AINCOM to AGND REFIN+, REFIN– to AGND P0, P1 Voltage to AGND Digital Input Voltage to DGND Digital Output Voltage to DGND ESD Rating (ESD Association Human Body Model, S5.1) ...
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... AIN Range ±1.25 V, Chopping Enabled, MCLK = 6.144 MHz CHOP = 0 EFFECTIVE (rms) p OUTPUT DATA RATE (kHz) AIN Range ±1.25 V, Chopping Disabled, MCLK = 6.144 MHz CHOP = 1 –1.5 –1.0 –0.5 0 0.5 AIN DIFFERENTIAL VOLTAGE (V) AD7739 14 16 03742-0-008 14 16 03742-0-009 1.0 1.5 03742-0-010 ...
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... The AD7739 noise will not vary significantly with MCLK frequency. CHOPPING ENABLED The first mode, in which the AD7739 is configured with chopping enabled (CHOP = 1), provides very low noise with lower output rates. Table 4. Typical Output RMS Noise in µV vs. Conversion Time and Input Range with Chopping Enabled ...
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... CHOPPING DISABLED The second mode, in which the AD7739 is configured with chopping disabled (CHOP = 0), provides faster conversion time while maintaining high resolution. Table 7 to Table 9 show the –3 dB frequencies and typical performance versus the channel conversion time and equivalent output data rate, respectively. ...
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... CMOS load. Chip Select. Active low Schmitt triggered logic input with an internal pull-up resistor. With this input hardwired low, the AD7739 can operate in its 3-wire interface mode using SCLK, DIN, and DOUT. CS can be used to select the device in systems with more than one device on the serial bus ...
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... P1 bit in the I/O port register. When the SYNC bit in the I/O port register is set to 1, then the SYNC/P1 pin can be used to synchronize the AD7739 modulator and digital filter with other devices in the system. The digital voltage is referenced to the analog supplies. When configured as an input, the pin should be tied high or low ...
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... The AD7739 has only one mode register, although the mode register can be accessed in one of eight address locations. The address used to write the mode register specifies the ADC channel on which the mode will be applied. Only address 0x38 must be used for reading from the mode register. ...
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... REGISTER ACCESS The AD7739 is configurable through a series of registers. Some of them configure and control general AD7739 features, while others are specific to each channel. The register data widths vary from 8 bits to 24 bits. All registers are accessed through the communications register, i.e., any communication to the AD7739 must start with a write to the communications register specifying which register will be subsequently read or written ...
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... RDYFN This bit is used to control the function of the RDY pin on the AD7739. When this bit is reset to 0, the RDY pin goes low when any channel has unread data. When this bit is set to 1, the RDY pin will go low only if all enabled channels have unread data. ...
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... RDY7 Default 0 CHECKSUM REGISTER 16 Bits, Read/Write Register, Address 0x05 This register is described in the Using the AD7732/AD7734/ AD7738/AD7739 Checksum Register application note (www.analog.com/UploadedFiles/Application_Notes/71751876 AN626_0.pdf). ADC ZERO-SCALE CALIBRATION REGISTER 24 Bits, Read/Write Register, Address 0x06, Default Value 0x80 0000 This register holds the ADC zero-scale calibration coefficient. ...
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... Bits, Read-Only Registers, Address 0x20–0x27, Default Value 0x20 × Channel Number These registers contain individual channel status information and some general AD7739 status information. Reading the status registers can be associated with reading the data registers in the dump mode. Reading the status registers is always associated with reading the data registers in the continuous read mode (see the Digital Interface Description section for details) ...
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... AIN6–AINCOM AIN4–AIN5 AIN7–AINCOM AIN6–AIN7 RNG1 RNG0 Nominal Input Voltage Range 0 0 ±2 +2 ±1. +1. ±0.625 +0.625 V Rev Page Bit 3 Bit 2 Bit 1 ENABLE RNG2 RNG1 COM0 1 AD7739 Bit 0 RNG0 0 ...
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... RDY pin to a logic high level, exits all current operations, and starts the mode specified by the mode bits. The AD7739 contains only one mode register. The two LSBs of the address are used for writing to the mode register to specify the channel selected for the operation determined by the MD2 to MD0 bits ...
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... DUMP bit value (see the Digital Interface Description section for details). 2 Cont RD When this bit is set to 1, the AD7739 will operate in the continuous read mode (see the Digital Interface Description section for details). 1 24/16 BIT Channel Data Register Data Width Selection Bit. When set to 1, the channel data registers will be 24 bits wide. ...
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... The AD7739 serial interface can be connected to the host device via the serial interface in several different ways. The CS pin can be used to select the AD7739 as one of several circuits connected to the host serial interface. When CS is high, the AD7739 ignores the SCLK and DIN signals and the DOUT pin goes to the high impedance state ...
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... RESET The AD7739 can be reset by the RESET pin or by writing a reset sequence to the AD7739 serial interface. The reset sequence is N × × 1, which could be the data sequence 0x00 + 0xFF + 0xFF + 0xFF + 0xFF in a byte-oriented interface. The AD7739 also features a power-on reset with a trip point and goes to the defined default state after power-on the system designer’ ...
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... After the conversion is complete, the relevant channel data register and channel status register are updated, the relevant RDY bit in the ADC status register is set, and the AD7739 continues converting on the next enabled channel. The part will cycle through all enabled channels until put into another mode or reset. The cycle period will be the sum of all enabled channels’ ...
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... Therefore, the RDYFN bit in the I/O port register should be 0, and reading the result should always start before the next conversion is completed. The AD7739 will stay in continuous read mode as long as the DIN pin is low while the CS pin is low; therefore, write 0 to the AD7739 while reading in continuous read mode. To exit continuous read mode, take the DIN pin high for at least 100 ns after a read is complete ...
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... ADC, a digital filter, a clock oscillator, a digital I/O port, and a serial communications interface. ANALOG INPUTS The AD7739 has nine analog input pins connected to the ADC through the internal multiplexer. The analog front end can be configured as eight single-ended inputs or four differential inputs or any combination of these (via the channel setup registers) ...
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... CHANNEL 1 – CHANNEL 1 SAMPLING SETTLING SAMPLING TIME TIME CONVERSION TIME CHANNEL 0 CHANNEL 1 SETTLING SAMPLING SCALING TIME TIME CONVERSION TIME Rev Page SCALING TIME TIME 03742-0-024 TIME 03742-0-025 AD7739 ...
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... AD7739 FREQUENCY RESPONSE The sigma-delta modulator runs at ½ the MCLK frequency, which is effectively the sampling frequency. Therefore, the modulator Nyquist frequency is ¼ of the MCLK. If chopping is enabled, the input signal is resampled by chopping. Therefore, the overall frequency response features notches close to the frequency of 1/channel conversion time. ...
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... The P1 pin ( SYNC /P1) can be used as a general-purpose digital 0 0 I/O pin or to synchronize the AD7739 with other devices in the 1 0 system. When the SYNC bit in the I/O port register is set and 1 0 the SYNC pin is low, the AD7739 does not process any ...
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... RDY bits in the ADC status register are set, the SYNC pin goes low, and the AD7739 reverts to idle mode. The calibration duration is the same as the conversion time configured on the selected channel. A longer conversion time gives less noise and yields a more exact calibration ...
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... ANALOG INPUTS 100Ω 0.1µF 100Ω AINCOM 0.1µ REFIN(+) ADR421 REFIN(-) + 10µF 0.1µF 0.1µF Figure 28. Typical Connections for the AD7739 Application 0.1µ AIN0 CLOCK GENERATOR 24-BIT MUX Σ-∆ ADC BUFFER AIN7 SERIAL INTERFACE AND CONTROL AD7739 ...
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... ORDERING GUIDE Model Temperature Range AD7739BRU –40°C to +105°C AD7739BRU-REEL –40°C to +105°C AD7739BRU-REEL7 –40°C to +105°C © 2003 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective companies. 7.90 7.80 7. ...