AD7490 Analog Devices, AD7490 Datasheet - Page 21

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AD7490

Manufacturer Part Number
AD7490
Description
16-Channel, 1MSPS, 12-Bit ADC with Sequencer in 28-Lead TSSOP
Manufacturer
Analog Devices
Datasheet

Specifications of AD7490

Resolution (bits)
12bit
# Chan
16
Sample Rate
1MSPS
Interface
Ser,SPI
Analog Input Type
SE-Uni
Ain Range
Uni (Vref),Uni (Vref) x 2
Adc Architecture
SAR
Pkg Type
CSP,SOP

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Powering Up the AD7490
When supplies are first applied to the AD7490, the ADC may
power up in any of the operating modes of the part. To ensure
that the part is placed into the required operating mode, the
user should perform a dummy cycle operation, as outlined in
Figure 26.
The three dummy conversion operations outlined in Figure 26
must be performed to place the part into either of the auto modes.
The first two conversions of this dummy cycle operation are
performed with the DIN line tied high, and for the third conver-
sion of the dummy cycle operation, the user should write the
desired control register configuration to the AD7490 to place
the part into the required auto mode. On the third CS rising
edge after the supplies are applied, the control register contains
the correct information and valid data results from the next
conversion.
DOUT
SCLK
DIN
CS
KEEP DIN LINE TIED HIGH FOR FIRST TWO DUMM Y CONVERSIONS
1
DUMMY CONVERSION
INVALID DATA
12
Figure 26. Placing into the Required Operating Mode After Supplies Are Applied
16
1
Rev. C | Page 21 of 28
DUMMY CONVERSION
INVALID DATA
Therefore, to ensure the part is placed into the correct operating
mode when supplies are first applied to the AD7490, the user
must first issue two serial write operations with the DIN line
tied high. On the third conversion cycle, the user can then write
to the control register to place the part into any of the operating
modes. The user should not write to the Shadow register until
the fourth conversion cycle after the supplies are applied to
the ADC to guarantee that the control register contains the
correct data.
If the user wishes to place the part into either normal mode or
full shutdown mode, the second dummy cycle with DIN tied
high can be omitted from the three dummy conversion
operation outlined in Figure 26.
12
16
1
CONTROL REGISTER IS LOADED ON THE
FIRST 12 CLOCK EDGES
DATA IN TO CONTROL
INVALID DATA
NEXT CONVERSION USER CAN
WRITE TO SHADOW REGISTER
CORRECT VALUE IN CONTROL
REGISTER VALID DATA FROM
IN NEXT CONVERSION
12
16
AD7490

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