AD7492 Analog Devices, AD7492 Datasheet
AD7492
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AD7492 Summary of contents
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... The AD7492 uses advanced design techniques to achieve very low power dissipation at high throughput rates. With 5 V supplies and 1.25 MSPS, the average current consumption AD7492-5 is typically 2.75 mA. The part also offers flexible power/throughput rate management also possible to operate the part in a full sleep mode and a partial sleep mode, where the part wakes conversion and automatically enters a sleep mode at the end of conversion ...
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... AD7492 TABLE OF CONTENTS Features .............................................................................................. 1 Functional Block Diagram .............................................................. 1 General Description ......................................................................... 1 Product Highlights ....................................................................... 1 Revision History ........................................................................... 2 Specifications..................................................................................... 3 AD7492-5 ...................................................................................... 3 AD7492/AD7492-4 ...................................................................... 4 Timing Specifications .................................................................. 6 Absolute Maximum Ratings............................................................ 7 ESD Caution.................................................................................. 7 Pin Configuration and Function Descriptions............................. 8 Typical Peformance Characteristics ............................................. 10 Terminology .................................................................................... 12 Circuit Description......................................................................... 13 REVISION HISTORY 5/06—Rev Rev. A Added AD7492-4................................................................Universal Changes to Table 4 ...
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... V − 0.2 V − 0.2 DRIVE DRIVE 0.4 0.4 ±10 ± Straight (natural) Straight (natural) binary binary Rev Page AD7492 Unit Test Conditions/Comments f = 1.25 MSPS S dB typ f = 500 kHz sine wave IN dB min f = 100 kHz sine wave IN dB typ f = 500 kHz sine wave IN dB min ...
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... Static, typ 200 nA Digital I/ max mW max μW max . DRIVE Unit Test Conditions/Comments MSPS for AD7492 400 kSPS for AD7492 typ f = 500 kHz sine wave IN dB min f = 100 kHz sine wave IN dB typ f = 500 kHz sine wave ...
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... Full Sleep Mode 1 Only A version specification applies to the AD7492-4. 2 Temperature ranges as follows: A and B versions: −40°C to +85°C. 3 500 kHz sine wave specifications do not apply for the AD7492- and V trigger levels are set by the V voltage. The logic interface circuitry is powered by V ...
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... Sample tested @ 25°C to ensure compliance. All input signals are specified with t 2 The AD7492-5 is specified with This is the time needed for the part to settle within 0.5 LSB of its stable value. Conversion can be initiated earlier than 20 μs, but there is no guarantee that the part samples within 0 ...
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... 0 −0 +0.3 V −0 0 −0 0 ±10 mA −40°C to +85°C −65°C to +150°C 150°C 450 mW 75°C/W (SOIC) 115°C/W (TSSOP) 25°C/W (SOIC) 35°C/W (TSSOP) 215°C 220°C Rev Page AD7492 ...
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... CS and RD. The output high voltage level for these outputs determined by the Analog Supply Voltage, 2 5.25 V. This is the only supply voltage for all analog circuitry on the AD7492. DD The AV DD even on a transient basis. This supply should be decoupled to AGND. ...
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... Mnemonic Function 20 DV Digital Supply Voltage, 2 5.25 V. This is the supply voltage for all digital circuitry on the AD7492 apart DD from the output drivers and input circuitry. The DV potential and must not be more than 0.3 V apart even on a transient basis. This supply should be decoupled to DGND ...
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... AD7492 TYPICAL PEFORMANCE CHARACTERISTICS 500 1000 1500 INPUT FREQUENCY (kHz) Figure 4. Typical SNR + D vs. Input Tone 100 200 350 500 INPUT FREQUENCY (kHz) Figure 5. Typical THD vs. Input Tone 70.60 70.4 –40°C 70 ...
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... CODE Figure 10. Typical INL for 2. 25°C 1.0 0.8 0.6 0.4 0.2 0 –0.2 –0.4 –0.6 –0.8 –1.0 3578 4089 0 512 Rev Page AD7492 1023 1534 2045 2556 3067 3578 CODE Figure 11. Typical DNL for 2. 25°C 4089 ...
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... The last transition should occur at the analog value 1 1/2 LSB below the nominal full scale. The first transition is a 1/2 LSB above the low end of the scale (zero in the case of AD7492). The gain error is the deviation of the actual difference between the first and last code transitions from the ideal difference between the first and last code transitions with offset errors removed ...
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... The CS and RD lines are then activated in parallel to read the 12 data bits. The internal band gap reference voltage is 2.5 V, providing an analog input range 2.5 V, making the AD7492 a unipolar A/D. A capacitor with a COMPARATOR minimum capacitance of 100 nF is needed at the output of the REF OUT pin as it stabilizes the internal reference value ...
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... PARALLEL INTERFACE pin of the ADC IN The parallel interface of the AD7492 is 12 bits wide. The output data buffers are activated when both CS and RD are logic low. At this point the contents of the data register are placed onto the data bus. Figure 19 shows the timing diagram for the parallel port. ...
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... The type of sleep mode the AD7492 enters depends on what way the PS/ FS pin is hardwired. If the PS/ FS pin is tied high, the AD7492 enters partial sleep mode. If the PS/ FS pin is tied low, the AD7492 enters full sleep mode. The device wakes up again on the rising edge of the CONVST signal. From partial sleep the AD7492 is capable of starting conversions typically 1 μ ...
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... PS/ FS pin while in power-down mode does not switch the part between partial sleep and full sleep modes. To switch from one sleep mode to another, the AD7492 has to be powered up and the polarity of the PS/ FS pin changed. It can then be powered down to the required sleep mode. ...
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... Figure 24. Partial Sleep Power Dissipation Figure 25, Figure 26, and Figure 27 show a typical graphical representation of power vs. throughput for the AD7492 when in Mode and 3 V, Mode 2 in full sleep mode @ 5 V and 3 V, and Mode 2 in partial sleep mode @ 5 V and 3 V. ...
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... Avoid running digital lines under the device as this couples noise onto the die. • The power supply lines to the AD7492 should use as large a trace as possible to provide a low impedance path and reduce the effects of glitches on the power supply line. ...
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... The INT pin on the PIC17C4x must be configured to be active on the negative edge. Port C and Port D of the microcontroller are bidirectional and used to address the AD7492 and to read in the 12-bit data. The OE pin on the PIC can be used to enable the output buffers on the AD7492 and perform a read operation. ...
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... I/O spaces.) Each data transfer consumes two bus cycles, one cycle to fetch data and the other to store data. After the AD7492 has finished the conversion, the BUSY line generates a DMA request to Channel 1 (DRQ1). Because of the interrupt, the processor performs a DMA read operation that resets the interrupt latch ...
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... AD7492ARZ–REEL7 −40°C to +85°C AD7492BR −40°C to +85°C AD7492BR-REEL −40°C to +85°C AD7492BR–REEL7 −40°C to +85°C 1 AD7492BRZ −40°C to +85°C AD7492AR-5 −40°C to +85°C AD7492AR-5–REEL −40°C to +85°C 15.60 (0.6142) 15.20 (0.5984 ...
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... AD7492ARUZ-5–REEL7 −40°C to +85°C 1 AD7492ARUZ-4 −40°C to +85°C 1 AD7492ARUZ-4REEL −40°C to +85°C 1 AD7492ARUZ-4REEL7 −40°C to +85°C AD7492BRU −40°C to +85°C AD7492BRU–REEL −40°C to +85°C AD7492BRU–REEL7 −40°C to +85°C 1 AD7492BRUZ −40°C to +85°C AD7492BRU-5 − ...
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... NOTES Rev Page AD7492 ...
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... AD7492 NOTES ©2006 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D01128-0-5/06(A) Rev Page ...